Use of chlorine to fabricate trench dielectric in integrated circuits
Abstract
Chlorine is incorporated into pad oxide ( 110 ) formed on a silicon substrate ( 120 ) before the etch of substrate isolation trenches ( 134 ). The chlorine enhances the rounding of the top corners ( 140 C) of the trenches when a silicon oxide liner ( 150.1 ) is thermally grown on the trench surfaces. A second silicon oxide liner ( 150.2 ) incorporating chlorine is deposited by CVD over the first liner ( 150.1 ), and then a third liner ( 150.3 ) is thermally grown. The chlorine concentration in the second liner ( 150.2 ) and the thickness of the three liners ( 150.1, 150.2, 150.3 ) are controlled to improve the corner rounding without consuming too much of the active areas ( 140 ).
Claims
exact text as granted — not AI-modified1 . An integrated circuit comprising:
a silicon substrate having a trench therein; a first dielectric in the trench, the first dielectric comprising: a first silicon oxide portion on a surface of the trench; and a second silicon oxide portion separated from the surface of the trench by the first silicon oxide portion, the second silicon oxide portion comprising chlorine at a higher concentration than the first silicon oxide portion.
2 . The integrated circuit of claim 1 wherein the first silicon oxide portion does not comprise chlorine.
3 . The integrated circuit of claim 1 wherein the chlorine concentration in the second silicon oxide portion is at least 1 atomic percent.
4 . The integrated circuit of claim 3 wherein the chlorine concentration in the second silicon oxide portion is at most 10 atomic percent.
5 . The integrated circuit of claim 1 wherein the chlorine concentration in the second silicon oxide portion is at least 10 13 atoms/cm 2 .
6 . The integrated circuit of claim 5 wherein the chlorine concentration in the second silicon oxide portion is at most 10 14 atoms/cm 2 .
7 . The integrated circuit of claim 1 wherein the first dielectric isolates adjacent active areas of the substrate from each other.
8 . The integrated circuit of claim 1 wherein further comprising a transistor active area in the substrate adjacent to the trench.Cited by (0)
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