Patterning methods and masks

Abstract

Masks for patterning material layers of semiconductor devices, methods of patterning and methods of manufacturing semiconductor devices, and lithography systems are disclosed. A lithography mask includes a pattern of alternating lines and spaces, wherein the lines and spaces comprise different widths. When the lithography mask is used to pattern a material layer of a semiconductor device, the pattern of the material layer comprises alternating lines and spaces having substantially the same width.

1 . A method of manufacturing a semiconductor device, the method comprising: 
 providing a lithography mask, the lithography mask comprising a first pattern for a plurality of alternating lines and spaces, the lines of the first pattern comprising a first width, the spaces of the first pattern comprising a second width, the second width being different than the first width;    providing a workpiece, the workpiece having a layer of photosensitive material disposed thereon; and    patterning the layer of photosensitive material using the lithography mask, forming a second pattern for a plurality of alternating lines and spaces in the layer of photosensitive material, the lines of the second pattern and the spaces of the second pattern comprising a third width, the third width being different than the first width and the second width.    
     
     
         2 . The method according to  claim 1 , wherein providing the workpiece comprises providing a workpiece having a material layer disposed thereon, the layer of photosensitive material being disposed over the material layer, further comprising: 
 exposing the layer of photosensitive material; and    using the layer of photosensitive material to pattern the material layer of the workpiece, forming lines and spaces comprising the third width in the material layer.    
     
     
         3 . The method according to  claim 2 , wherein the material layer comprises a conductive material, a semiconductive material, or an insulating material.  
     
     
         4 . The method according to  claim 1 , wherein the first width comprises the third width decreased by an adjustment amount, and wherein the second width comprises the third width increased by the adjustment amount.  
     
     
         5 . The method according to  claim 4 , wherein the adjustment amount is equal to about 50% or less of the third width.  
     
     
         6 . A semiconductor device manufactured in accordance with  claim 1 .  
     
     
         7 . A lithography mask, comprising: 
 a first pattern for a plurality of alternating lines and spaces, the lines of the first pattern comprising a first width, the spaces of the first pattern comprising a second width, the second width being different than the first width, wherein when the lithography mask is used to pattern a layer of photosensitive material of a semiconductor device, a second pattern for a plurality of alternating lines and spaces is formed in the layer of photosensitive material, the lines of the second pattern and the spaces of the second pattern comprising a third width, the third width being different than the first width and the second width.    
     
     
         8 . The lithography mask according to  claim 7 , wherein the lithography mask comprises a binary mask.  
     
     
         9 . The lithography mask according to  claim 7 , wherein the lithography mask comprises an immersion lithography mask.  
     
     
         10 . The lithography mask according to  claim 7 , wherein the lithography mask comprises an alternating phase shift mask.  
     
     
         11 . The lithography mask according to  claim 7 , wherein the lines and spaces of the second pattern formed in the layer of photosensitive material comprise substantially the same width.  
     
     
         12 . A lithography system including the lithography mask according to  claim 7 .  
     
     
         13 . A lithography mask, comprising: 
 a first pattern for a plurality of alternating lines and spaces, alternating spaces of the first pattern comprising a first thickness and a second thickness, the first thickness comprising a first width and the second thickness comprising a second width, the second width being different than the first width, the lines of the first pattern being defined by an intersection of the first thickness and the second thickness, wherein when the lithography mask is used to pattern a layer of photosensitive material of a semiconductor device, a second pattern for a plurality of alternating lines and spaces is formed in the layer of photosensitive material, the lines of the second pattern and the spaces of the second pattern comprising a third width, the third width being different than the first width and the second width.    
     
     
         14 . The lithography mask according to  claim 13 , wherein the lithography mask comprises an alternating phase shift mask.  
     
     
         15 . A lithography system, comprising: 
 a light source;    a lithography mask comprising a first pattern for a plurality of alternating lines and spaces, the lines of the first pattern comprising a first width, the spaces of the first pattern comprising a second width, the second width being different than the first width;    a lens system disposed between the light source and the lithography mask; and    a support means for a semiconductor device, wherein when the lithography mask is used to pattern a layer of photosensitive material disposed on the semiconductor device, a second pattern for a plurality of alternating lines and spaces is formed in the layer of photosensitive material, the lines of the second pattern and the spaces of the second pattern comprising a third width, the third width being different than the first width and the second width.    
     
     
         16 . The lithography system according to  claim 15 , wherein the lithography system comprises a k1 factor of about 0.27 or greater.  
     
     
         17 . The lithography system according to  claim 15 , wherein the lithography system comprises an immersion lithography system, further comprising a projection lens system between the lithography mask and the support means for the semiconductor device, and means for disposing a fluid between the projection lens system and the semiconductor device.  
     
     
         18 . A method of manufacturing a lithography mask, the method comprising: 
 determining a layout for a plurality of alternating lines and spaces, each line of the layout comprising a first width, each space of the layout comprising a second width, the second width being different than the first width;    fabricating a test mask including the layout;    using the test mask to pattern a test workpiece; and    if the test mask results in the formation of a plurality of alternating lines and spaces on the test workpiece having a third width, each line and each space comprising the third width, fabricating a mask including the layout.    
     
     
         19 . The method according to  claim 18 , wherein determining the layout comprises determining a first layout, wherein fabricating the test mask comprises fabricating a first test mask, and wherein using the test mask to pattern the test workpiece comprises patterning a first test workpiece, wherein if the first test mask does not result in the formation of a plurality of alternating lines and spaces comprising a third width, each line and each space comprising the third width, further comprising: 
 determining a second layout for a plurality of alternating lines and spaces, each line of the second layout comprising a fourth width, each space of the second layout comprising a fifth width, the fifth width being different than the fourth width, the fourth width being different than the first width, the fifth width being different than the second width;    fabricating a second test mask including the second layout;    using the second test mask to pattern a second test workpiece; and    if the second test mask results in the formation of a plurality of alternating lines and spaces on the second test workpiece having a third width, each line and each space comprising the third width, fabricating a mask including the second layout.    
     
     
         20 . The method according to  claim 19 , wherein determining the second layout comprises determining a plurality of second layouts, each second layout comprising a different line width and space width.  
     
     
         21 . The method according to  claim 18 , wherein determining the layout comprises determining a plurality of layouts, each layout comprising a different line width and space width.  
     
     
         22 . The method according to  claim 21 , further comprising fabricating a single test lithography mask comprising the plurality of layouts, and measuring the test workpiece to determine an optimum layout to use to produce the plurality of alternating lines and spaces on the test workpiece having the third width.  
     
     
         23 . The method according to  claim 22 , wherein the optimum layout comprises the layout that produces lines and spaces on the test workpiece comprising substantially equal third widths.  
     
     
         24 . The method according to  claim 18 , further comprising, first, determining the third width, and second, determining the layout for the plurality of alternating lines and spaces, the first width and the second width being different than the third width.  
     
     
         25 . The method according to  claim 24 , wherein determining the layout for the plurality of alternating lines and spaces comprises decreasing the third width by an adjustment amount to determine the first width and increasing the third width by the adjustment amount to determine the second width, wherein the adjustment amount comprises about 50% or less of the third width.