In-line apparatus and method for manufacturing double-sided stacked multi-chip packages
Abstract
Provided are in-line semiconductor chip packaging apparatuses that include a buffer assembly in which a reversing unit rotates a lead frame 180° between die attaching and/or wire bonding operations and methods of manufacturing an integrated circuit chip package using such an in-line integrated circuit chip packaging apparatus. Between packaging process operations, the lead frame, which includes first and second surfaces may be rotated, thereby reversing the orientation of the first and second surfaces. The apparatuses will include one or more processing units for attaching semiconductor chips to the leadframe, or a previously mounted semiconductor chip, or for forming wire bonds between the attached semiconductor chip(s) and the corresponding lead fingers of the lead frame, attached to and/or separated by an in-line buffer assembly that includes a reversing unit.
Claims
exact text as granted — not AI-modified1 - 12 . (canceled)
13 . A method of manufacturing a double-sided semiconductor chip package comprising:
preparing a lead frame having a die pad and leads terminating adjacent the die pad, the die pad having a first surface and a second surface; orienting the lead frame with the first surface facing upwardly; feeding the lead frame into a first processing unit wherein a first chip packaging operation is applied to the first surface to obtain a processed lead frame; reversing the processed lead frame whereby the second surface is oriented to face upwardly to obtain a reversed lead frame; and feeding the reversed lead frame into a second processing unit wherein a second chip packaging operation is applied to the second surface to obtain a completed lead frame.
14 . A method of manufacturing a double-sided semiconductor chip package according to claim 13 , wherein:
the first chip packaging operation includes attaching a first semiconductor chip to the first surface of the die pad; and the second chip packaging operation includes attaching a second semiconductor chip to the second surface of the die pad.
15 . A method of manufacturing a double-sided semiconductor chip package according to claim 13 , wherein:
the first chip packaging operation includes forming wire bonds between a first semiconductor chip and the adjacent leads; and the second chip packaging operation includes forming wire bonds between a second semiconductor chip and the adjacent leads.
16 . A method of manufacturing a double-sided semiconductor chip package according to claim 13 , wherein:
reversing the processed lead frame includes
moving the processed lead frame onto a guide rail;
rotating the guide rail 180 ° to obtain a reversed lead frame; and
removing the reversed lead frame from the guide rail.
17 . A method of manufacturing a double-sided semiconductor chip package according to claim 16 , wherein:
the guide rail has a longitudinal axis and the guide rail is rotated about an axis that is perpendicular to the longitudinal axis.
18 . A method of manufacturing a double-sided semiconductor chip package according to claim 16 , wherein:
the guide rail has a longitudinal axis and the guide rail is rotated about an axis that is parallel to the longitudinal axis.
19 . A method of manufacturing a double-sided semiconductor chip package comprising:
preparing a lead frame having a die pad and leads terminating adjacent the die pad, the die pad having a first surface and a second surface, the second surface being positioned opposite the first surface; orienting the lead frame with the first surface facing upwardly; feeding the lead frame into a processing unit wherein a first chip packaging operation is applied to the first surface to obtain a processed lead frame; reversing the processed lead frame whereby the second surface is oriented to face upwardly to obtain a reversed lead frame; and returning the reversed lead frame to the processing unit wherein a second chip packaging operation is applied to the second surface to obtain a completed lead frame.
20 . A method of manufacturing a double-sided semiconductor chip package according to claim 19 , wherein:
the first chip packaging operation includes attaching a first semiconductor chip to the first surface of the die pad or forming wire bonds between a first semiconductor chip and the adjacent leads; and the second chip packaging operation includes attaching a second semiconductor chip to the second surface of the die pad or forming wire bonds between a second semiconductor chip and the adjacent leads.Join the waitlist — get patent alerts
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