US2007192626A1PendingUtilityA1

Exponent windowing

48
Assignee: FEGHALI WAJDI KPriority: Dec 30, 2005Filed: Dec 28, 2006Published: Aug 16, 2007
Est. expiryDec 30, 2025(expired)· nominal 20-yr term from priority
G06F 21/602
48
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Claims

Abstract

The disclosure includes description of a processor component that includes a set of register bits to perform a shift register operation. The component window detection logic can detect a window of bits in the set of register bits and, in response to detecting the window, output the window of bits.

Claims

exact text as granted — not AI-modified
1 . A processor component, comprising: 
 a set of register bits to perform a shift register operation;    window detection logic to detect a window of bits in the set of register bits, the window of bits having at least one non-zero bit and having a number of bits fewer than the number of register bits in the set of register bits; and    in response to detecting the window, outputting, at least, the detected window of bits.    
   
   
       2 . The processor component of  claim 1 , 
 further comprising, in response to detecting the window, zeroing the non-zero bits in the set of register bits corresponding to the detected window.    
   
   
       3 . The processor component of  claim 1 , 
 further comprising, outputting a signal indicating a window was found in the set of register bits.    
   
   
       4 . The processor component of  claim 3 , 
 wherein the processor comprises a processor having a branch instruction that operates on the signal.    
   
   
       5 . The processor component of  claim 1 , 
 further comprising logic to receive a window size identifying a bit-width of the window.    
   
   
       6 . A method, comprising: 
 repeatedly shifting bits of an exponent into a set of register bits;    detecting windows of non-zero bits in the set of register bits, the windows having a number of bits fewer than the number of register bits in the set of register bits; and    performing lookups of the detected windows of non-zero bits in a set of pre-computed values.    
   
   
       7 . The method of  claim 6 , 
 further comprising zeroing the non-zero bits in the set of register bits corresponding to the windows after detecting the windows.    
   
   
       8 . The method of  claim 6 , 
 further comprising executing a branch instruction that conditionally branches based on a signal indicating a window has been detected.    
   
   
       9 . The method of  claim 6 , 
 further comprising specifying a window size.    
   
   
       10 . The method of  claim 6 , 
 further comprising shifting out bits from the set of register bits; and    for non-zero bit values shifted out, squaring a value used in an exponentiation operation associated with the exponent.    
   
   
       11 . The method of  claim 6 , 
 further comprising multiplying a value used in an exponentiation operation associated with the exponent using a pre-computed value in the set of pre-computed values identified by a detected window.    
   
   
       12 . A computer program product, disposed on a computer readable medium, comprising instructions for causing a processor to: 
 repeatedly shift bits of an exponent into a set of register bits;    detect windows of non-zero bits in the set of register bits, the windows having a number of bits fewer than the number of register bits in the set of register bits; and    perform lookups of the detected windows of non-zero bits in a set of pre-computed values.    
   
   
       13 . The computer program of  claim 12 , 
 further comprising causing the processor to zero the non-zero bits in the set of register bits corresponding to the windows after detecting the windows.    
   
   
       14 . The computer program of  claim 12 , 
 wherein the instructions comprise a branch instruction that conditionally branches based on a signal indicating a window has been detected.    
   
   
       15 . The computer program of  claim 12 , 
 further comprising instructions to specify a window size.    
   
   
       16 . The computer program of  claim 12 , 
 wherein the instructions cause the processor to:    shift out bits from set of register bits; and    for non-zero bit values shifted out, square a value used in an exponentiation operation associated with the exponent.    
   
   
       17 . The computer program of  claim 12 , 
 wherein the instructions comprise instructions to multiply a value used in exponentiation operation associated with the exponent using a pre-computed value in the set of pre-computed values identified by a detected window.

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