Semiconductor device

Abstract

A chip size package semiconductor device can have reliable solder mounting and improved mounting reliability. A semiconductor device ( 10 ) of one embodiment can include a semiconductor chip ( 1 ) mounted to a bottom portion ( 11 ) of a metal base ( 10 ). A metal base ( 10 ) can have side portions ( 12 ) with connection electrodes ( 15 ) having a surface level higher than that of electrodes ( 7 and 8 ) on a surface of the semiconductor chip ( 1 ) by a difference (d). The semiconductor device ( 10 ) can be mounted face down without abutting the semiconductor chip ( 1 ) against a mounting substrate, thereby preventing mechanical damage to a semiconductor chip ( 1 ). At the same time, a solder layer can be formed in the gap between electrodes ( 7 and 8 ) and the mounting substrate, thereby raising the reliability of the soldering connection.

1 - 22 . (canceled)  
   
   
       23 . A semiconductor device, comprising: 
 a metal base having a bottom portion and first and second side portions each situated upward from the bottom portion, the metal base further having first and second connection electrodes on the first and second side portions, respectively,    a semiconductor chip having a first surface mounted to a part of the bottom portion of the metal base between the first and second side portions, the semiconductor chip further having a second surface opposite to the first surface and a surface electrode on the second surface,    wherein the surface electrode of the semiconductor chip is at a first surface level, the first and second connection electrodes of the metal base are at a second surface level higher than the first surface level, and    the semiconductor device has a vacancy between the first surface level and the second surface level.    
   
   
       24 . The semiconductor device of  claim 23 , wherein: 
 each of the first and second side portions has a projecting piece being bent outward from the semiconductor chip and each of the first and second connection electrodes is formed on the projecting piece of an associated one of the first and second side portions.    
   
   
       25 . The semiconductor device of  claim 23 , wherein: 
 each of the first and second side portions has a convex portion and the first and second electrodes are formed on the convex portion of an associated one of the first and second side portions.    
   
   
       26 . The semiconductor device of  claim 23 , wherein: 
 the surface electrode of the semiconductor chip includes a solder ball or bump, a top surface level of the solder ball or bump on the surface electrode is at the first surface level.    
   
   
       27 . The semiconductor device of  claim 23  wherein: 
 each of the first and second connection electrodes of the metal base include a solder ball or bump, a top surface level of the solder ball or bump of each of the first and second connection electrodes is at the second surface level.    
   
   
       28 . The semiconductor device of  claim 23 , wherein: 
 the semiconductor chip includes an insulated gate field effect transistor (IGFET) having a drain electrode formed on the first surface and a gate electrode and a source electrode formed on the second surface, and the surface electrode includes first and second electrodes, the drain electrode being electrically contacted to the first and second connection electrodes via the base metal, and the gate electrode and the source electrode being electrically connected respectively to the first and second electrodes.    
   
   
       29 . The semiconductor device of  claim 23 , wherein: 
 a difference between the first surface level and the second surface level is greater than 0.01 mm and less than or equal to 0.1 mm.