US2007273018A1PendingUtilityA1

Semiconductor apparatus and method for manufacturing the same

Assignee: TOSHIBA KKPriority: Mar 29, 2006Filed: Feb 26, 2007Published: Nov 29, 2007
Est. expiryMar 29, 2026(expired)· nominal 20-yr term from priority
H10W 90/10H10W 74/142H10W 72/9413H10W 72/241H10W 72/0198H10W 70/09B81C 2201/019B81C 1/00246B81C 2203/0771B81C 1/0023
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Claims

Abstract

It is made possible to provide a highly integrated, thin apparatus can be obtained, even if the apparatus contains MEMS devices and semiconductor devices. A semiconductor apparatus includes: a first chip comprising a MEMS device formed therein; a second chip comprising a semiconductor device formed therein; and an adhesive layer bonding a side face of the first chip to a side face of the second chip, and having a lower Young's modulus than the material of the first and second chips.

Claims

exact text as granted — not AI-modified
1 . A semiconductor apparatus comprising
 a first chip comprising a MEMS device formed therein;   a second chip comprising a semiconductor device formed therein; and   an adhesive layer bonding a side face of the first chip to a side face of the second chip, and having a lower Young's modulus than the material of the first and second chips.   
   
   
       2 . The apparatus according to  claim 1 , wherein a principal face of the first chip and a principal face of the second chip are located substantially in the same plane. 
   
   
       3 . The apparatus according to  claim 2 , further comprising:
 another adhesive layer formed on a bottom face of the first chip, a bottom face of the second chip, and a face of the adhesive layer on the side of the bottom faces of the first and second chips.   
   
   
       4 . The apparatus according to  claim 2 , further comprising:
 an insulating layer provided so as to cover the principal face of the first chip, the principal face of the second chip, and a face of the adhesive layer on the side of the principal faces of the first and second chips; and   a wire provided on the insulating layer and electrically connects the MEMS device and the semiconductor device.   
   
   
       5 . The apparatus according to  claim 4 , wherein a width of the wire on the adhesive layer is greater than a width of the wire on the first and second chips. 
   
   
       6 . The apparatus according to  claim 1 , wherein a bottom face of the first chip and a principal face of the second chip are located substantially in the same plane. 
   
   
       7 . The apparatus according to  claim 6 , further comprising:
 a wire electrically connecting the MEMS device and the semiconductor device, and configured to penetrate the adhesive layer from one face to the other thereof.   
   
   
       8 . The apparatus according to  claim 1 , wherein the first chip and the second chip have substantially the same height. 
   
   
       9 . The apparatus according to  claim 1 , wherein the adhesive layer that bonds the side face of the first chip to the side face of the second chip is made of epoxy resin. 
   
   
       10 . The apparatus according to  claim 1 , wherein the adhesive layer that bonds the side face of the first chip to the side face of the second chip has a Young's modulus of 10 GPa or less. 
   
   
       11 . A semiconductor apparatus comprising:
 a first chip comprising a MEMS device formed therein;   a second chip comprising a semiconductor device formed therein;   a first adhesive layer bonding a side face of the first chip to a side face of the second chip, and having a lower Young's modulus than the material of the first and second chips;   a third chip comprising a MEMS device formed therein; and   a fourth chip comprising a semiconductor device formed therein; and   a second adhesive layer bonding a side face of the third chip to a side face of the fourth chip, and having a lower Young's modulus than the material of the third and fourth chips.   
   
   
       12 . The apparatus according to  claim 11 , wherein:
 a principal face of the first chip and a principal face of the second chip are located substantially in the same plane; and   a principal face of the third chip and a principal face of the fourth chip are located substantially in the same plane.   
   
   
       13 . The apparatus according to  claim 11 , wherein:
 a bottom face of the first chip and a principal face of the second chip are located substantially in the same plane; and   a bottom face of the third chip and a principal face of the fourth chip are located substantially in the same plane.   
   
   
       14 . The apparatus according to  claim 11 , wherein the first and second adhesive layers are made of epoxy resin. 
   
   
       15 . The apparatus according to  claim 11 , wherein the first and second adhesive layer each have a Young's modulus of 10 GPa or less. 
   
   
       16 . A method for manufacturing a semiconductor apparatus, comprising:
 forming a plurality of semiconductor devices on a first semiconductor substrate;   forming a first protection film that covers the plurality of semiconductor devices;   temporarily bonding the first protection film to a first temporary adhesive layer that is formed on a surface of a first substrate that is independent of the first semiconductor substrate;   forming a plurality of semiconductor chips by cutting the first semiconductor substrate and dividing the plurality of semiconductor devices;   removing one of the semiconductor chips from the first temporary adhesive layer by selectively picking up the one semiconductor chip;   temporarily bonding and transferring the picked-up semiconductor chip onto a second adhesive layer that is formed on a surface of a second substrate that is independent of the first substrate;   forming a plurality of MEMS devices on a second semiconductor substrate that is independent of the first semiconductor substrate;   forming a second protection film that covers the plurality of MEMS devices;   temporarily bonding the second protection film to a third temporary adhesive layer that is formed on a surface of a third substrate that is independent of the first substrate and the second substrate;   forming a plurality of MEMS chips by cutting the second semiconductor substrate and dividing the plurality of MEMS devices;   removing one of the MEMS chips from the third temporary adhesive layer by selectively picking up the one MEMS chip;   temporarily bonding and transferring the picked-up MEMS chip onto the second temporary adhesive layer formed on the surface of the second substrate;   forming a first adhesive layer so as to cover the MEMS chip and the semiconductor chip and to fill a space between the MEMS chip and the semiconductor chip;   making the heights of the MEMS chip and the semiconductor chip equal to each other with respect to the second temporary adhesive layer by polishing the first adhesive layer and polishing at least one of the MEMS chip and the semiconductor chip; and   removing the MEMS chip and the semiconductor chip from the second temporary adhesive layer by bonding the MEMS chip and the semiconductor chip to a second adhesive layer that is formed on a supporting substrate.

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