US2007276623A1PendingUtilityA1
Semiconductor Component Test Process and a System for Testing Semiconductor Components
Est. expiryJun 24, 2023(expired)· nominal 20-yr term from priority
G11C 29/56016G11C 29/56G01R 31/3167
36
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
A test system can be used for testing semiconductor components, with which several different semiconductor component tests can be performed in succession. A test apparatus receives a test result for a first test and a test result for a second test and evaluates whether the test results from the first and second tests are mutually correlated by evaluating whether the test results comprises a pattern determined during a training phase of the system. The test apparatus then determines whether or not the pattern indicates that a further test is to be dispensed with.
Claims
exact text as granted — not AI-modified1 . A test system for testing semiconductor components, with which several different semiconductor component tests can be performed in succession, the test system comprising:
a test apparatus for receiving a test result for a first test and a test result for a second test and evaluating whether the test results from the first and second tests are mutually correlated by evaluating whether the test results comprises a pattern determined during a training phase of the system, the test apparatus using test result data obtained in a third test to determine whether or not the pattern indicates that a further test is to be dispensed with, the third test being different from the first test and the second test.
2 . The test system according to claim 1 , wherein the first and second test results are obtained by the test apparatus.
3 . The test system according to claim 1 ,wherein the first test result is obtained by the test apparatus, and the second test result is obtained by a second test apparatus.
4 . The test system according to claim 1 , wherein the first test is an AC test and the second test is a DC test.
5 . The test system according to claim 1 , wherein the first test is an AC test performed under first test conditions and the second test is an AC test performed under second different test conditions different than the first test conditions.
6 . The test system according to claim 1 , wherein the first test is an DC test performed under first test conditions and the second test is an DC test performed under second different test conditions different than the first test conditions.
7 . The test system according to claim 1 , wherein data of the third test is obtained by a third test apparatus.
8 . The test system according to claim 1 , wherein the test apparatus evaluates whether the test results from the first and second tests are mutually correlated based on a pattern recognition procedure.
9 . The test system according to claim 1 , wherein the test apparatus comprises a neural network.
10 . A test system for testing semiconductor components, the test system comprising:
a test apparatus for evaluating test results of a semiconductor device, the test results including a passing result of a first test and a passing result of a second test, the test apparatus evaluating the passing result of the first test and the passing result of the second test to determine whether or not a third test is to be performed or is to be dispensed with.
11 . The test system of claim 10 , wherein the test apparatus evaluates the passing results by evaluating whether the passing result of the first test and the passing result are mutually correlated such that the data comprises a pattern that was determined during a training phase of the system.
12 . The test system according to claim 10 , wherein the first test is an AC test and the second test is a DC test.
13 . The test system according to claim 10 , wherein the first test is an AC test performed under first test conditions and the second test is an AC test performed under second different test conditions different than the first test conditions.
14 . The test system according to claim 10 , wherein the first test is an DC test performed under first test conditions and the second test is an DC test performed under second different test conditions different than the first test conditions.
15 . The test system according to claim 10 , wherein the test apparatus evaluates the passing result of the first test and the passing result of the second test based on a pattern recognition procedure.
16 . The test system according to claim 10 , in which the test apparatus comprises a neural network.
17 . A method of testing semiconductor components, the method comprising:
performing a first test on a plurality of semiconductor components; performing a second test on ones of the semiconductor components that pass the first test; evaluating test data for each of the semiconductor components that pass the second test; and based on the result of the evaluating, performing a third test on selected ones of the semiconductor components that passed the second test, the third test not being performed on other ones of the semiconductor components that passed the second test.
18 . The method of claim 17 , further comprising fabricating the plurality of semiconductor components.
19 . The method of claim 17 , wherein the plurality of semiconductor components comprise dice on a single wafer.
20 . The method of claim 17 , further comprising performing a fabrication step on the ones of the semiconductor components that pass the first test before performing the second test.
21 . The method of claim 17 , wherein evaluating the test data comprises using a neural network.
22 . The method of claim 21 , wherein evaluating the test data comprises performing a pattern recognition.
23 . The method of claim 17 , wherein evaluating the test data comprises performing a pattern recognition.
24 . The method of claim 17 , wherein the first test and the second test are performed by the same test apparatus.
25 . The method of claim 17 , wherein the first test and the second test are performed by the different test apparatuses.
26 . The method of claim 17 , wherein the first test comprises an AC test and the second test comprises a DC test.
27 . The method of claim 17 , wherein the first test comprises an AC test performed under first test conditions and the second test comprises an AC test performed under second different test conditions different than the first test conditions.
28 . The method of claim 17 , wherein the first test comprises an DC test performed under first test conditions and the second test comprises an DC test performed under second different test conditions different than the first test conditions.Cited by (0)
No later patents cite this yet.
References (0)
No backward citations on record.