Use of teos oxides in integrated circuit fabrication processes

Abstract

A method for manufacturing a low temperature removable silicon dioxide hard mask for patterning and etching is provided, wherein tetra-ethyl-ortho-silane (TEOS) is used to deposit a silicon dioxide hard mask.

1 . A semiconductor device comprising: 
 a semiconductor substrate;    an insulating layer formed on the semiconductor substrate;    an at least partially conductive layer formed on the insulating layer; and    a porous tetra-ethyl-ortho-silicate (TEOS) layer formed on the conductive layer.    
   
   
       2 . The semiconductor device of  claim 1 , further comprising: 
 a layer of photoresist formed on the porous TEOS layer.    
   
   
       3 . The semiconductor device of  claim 2 , further comprising: 
 a layer of silicon oxy-nitride (SiON) formed on the porous TEOS layer and under the photoresist layer.    
   
   
       4 . The semiconductor device of  claim 3 , wherein the at least partially conductive layer comprises a polysilicon layer.