Three Dimensional Six Surface Conformal Die Coating

Abstract

Semiconductor die are typically manufactured as a large group of integrated circuit die imaged through photolithographic means on a semiconductor wafer or slice made of silicon. After manufacture, the silicon wafer is thinned, usually by mechanical means, and the wafer is cut, usually with a diamond saw, to singulate the individual die. The resulting individual integrated circuit has six exposed surfaces. The top surface of the die includes the circuitry images and any passivation layers that have been added to the top layer during wafer fabrication. The present invention describes a method for protecting and insulating all six surfaces of the die to reduce breakage, provide electrical insulation for these layers, and to provide physical surfaces that can be used for bonding one semiconductor die to another for the purpose of stacking die in an interconnected module or component.

1 . A singulated integrated circuit die including six surfaces, the die being free of permanent attachment and having an electrically insulating material applied to all surfaces.  
   
   
       2 . The die as in  claim 1  wherein the electrically insulating material is a polymer.  
   
   
       3 . The die as in  claim 2  wherein the electrically insulating material is parylene.  
   
   
       4 . The die as in  claim 3 , further comprising an opening in the insulating material exposing a feature in an underlying surface.  
   
   
       5 . The die as in  claim 4  wherein the opening exposes an electrical connection pad in a top surface of the die.  
   
   
       6 . The die as in  claim 4  wherein the opening exposes an optical emitter or sensor in a top surface of the die.  
   
   
       7 . A method for preparing an electrically insulated semiconductor die for use in a component, comprising providing a die having six surfaces, and applying a conformal electrically insulating material onto the die surfaces.  
   
   
       8 . The method of  claim 7  further comprising, prior to applying the conformal coating, rerouting from original connection pads on the die as provided to new locations at the edge of the die.  
   
   
       9 . The method of  claim 7  wherein applying the conformal electrically insulating material onto the die surfaces comprises forming a polymer onto the die surfaces.  
   
   
       10 . The method of  claim 9  wherein applying the conformal electrically insulating material onto the die surfaces comprises forming parylene onto the die surfaces.  
   
   
       11 . The method of  claim 7 , further comprising making openings through the insulating material exposing a feature on the underlying surface.  
   
   
       12 . The method of  claim 11  wherein exposing a feature on the underlying surface comprises exposing an electrical connection pad.  
   
   
       13 . The method of  claim 11  wherein exposing a feature on the underlying surface comprises exposing an optical emitter or sensor.