US2008012106A1PendingUtilityA1

Chip package structure and fabricating method threrof

40
Assignee: CHIPMOS TECHNOLOGIES SHANGHAIPriority: Jul 11, 2006Filed: Sep 8, 2006Published: Jan 17, 2008
Est. expiryJul 11, 2026(expired)· nominal 20-yr term from priority
H10W 90/756H10W 90/736H10W 74/00H10W 72/5473H10W 72/5449H10W 72/932H10W 72/865H10W 70/68H10W 70/468H10W 70/415
40
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A chip package structure including a chip, a lead frame, first bonding wires and second bonding wires is provided. The chip has an active surface and chip bonding pads disposed thereon. The lead frame is fixed on the chip and the lead frame includes inner leads, at least one bus bar, an insulating layer and transfer bonding pads. The bus bar is located between the chip bonding pads and the inner leads. The insulating layer is disposed on the bus bar and the transfer bonding pads are disposed thereon. The inner leads and the bus bar are located above the active surface. The chip and the insulating layer are located respectively on two opposite surfaces of the bus bar. The first bonding wires respectively connect the chip bonding pads and the transfer bonding pads. The second bonding wires respectively connect the transfer bonding pads and the inner leads.

Claims

exact text as granted — not AI-modified
1 . A chip package structure, comprising:
 a chip, having an active surface and a plurality of chip bonding pads, wherein the chip bonding pads are disposed on the active surface;   a lead frame, fixed on the chip, the lead frame comprising:
 a plurality of inner leads; 
 at least one bus bar, located between the chip bonding pads and the inner leads; 
 an insulating layer, disposed on the bus bar; and 
 a plurality of transfer bonding pads, disposed on the insulating layer, wherein the inner leads and the bus bar are located above the active surface of the chip, and the chip and the insulating layer are respectively located on two opposite surfaces of the bus bar; 
   a plurality of first bonding wires, respectively connecting the chip bonding pads and the transfer bonding pads; and   a plurality of second bonding wires, respectively connecting the transfer bonding pads and the inner leads.   
     
     
         2 . The chip package structure as claimed in  claim 1 , wherein the bus bar is in an annular shape. 
     
     
         3 . The chip package structure as claimed in  claim 1 , wherein the bus bar is in a strip-shape. 
     
     
         4 . The chip package structure as claimed in  claim 1 , further comprising an encapsulant, so as to cover the active surface, the inner leads, the bus bar, the first bonding wires and the second bonding wires. 
     
     
         5 . A chip package structure, comprising:
 a chip, having an active surface and a plurality of chip bonding pads, wherein the chip bonding pads are disposed on the active surface;   a lead frame, comprising:
 a die pad, wherein the chip is disposed on the die pad, and the active surface is away from the die pad; 
 a plurality of inner leads; 
 at least one bus bar, located between the die pad and the inner leads; 
 an insulating layer, disposed on the bus bar; and 
 a plurality of transfer bonding pads, disposed on the insulating layer; 
   a plurality of first bonding wires, respectively connecting the chip bonding pads and the transfer bonding pads; and   a plurality of second bonding wires, respectively connecting the transfer bonding pads and the inner leads.   
     
     
         6 . The chip package structure as claimed in  claim 5 , wherein the bus bar is in an annular shape. 
     
     
         7 . The chip package structure as claimed in  claim 5 , wherein the bus bar is in a strip-shape. 
     
     
         8 . The chip package structure as claimed in  claim 5 , further comprising an encapsulant, so as to cover the active surface, the die pad, the inner leads, the bus bar, the first bonding wires and the second bonding wires. 
     
     
         9 . A method of fabricating a chip package structure, comprising:
 providing a lead frame having a plurality of inner leads and at least one bus bar;   forming an insulating layer on the bus bar;   forming a plurality of transfer bonding pads on the insulating layer;   providing a chip having an active surface and a plurality of chip bonding pads, wherein the chip bonding pads are disposed on the active surface;   fixing the chip below the lead frame, such that the inner leads and the bus bar are located above the active surface of the chip, and the chip and the insulating layer are respectively located on two opposite surfaces of the bus bar;   forming a plurality of first bonding wires, so as to respectively connect the chip bonding pads and the transfer bonding pads; and   forming a plurality of second bonding wires, so as to respectively connect the transfer bonding pads and the inner leads.   
     
     
         10 . The method of fabricating the chip package structure as claimed in  claim 9 , further comprising forming an encapsulant, so as to cover the active surface, the inner leads, the bus bar, the first bonding wires and the second bonding wires. 
     
     
         11 . A method of fabricating a chip package structure, comprising:
 providing a lead frame having a die pad, a plurality of inner leads and at least one bus bar, wherein the bus bar is located between the die pad and the inner leads;   forming an insulating layer on the bus bar;   forming a plurality of transfer bonding pads on the insulating layer;   providing a chip having an active surface and a plurality of chip bonding pads, wherein the chip bonding pads are disposed on the active surface;   fixing the chip on the die pad, wherein the active surface is away from the die pad;   forming a plurality of first bonding wires, so as to respectively connect the chip bonding pads and the transfer bonding pads; and   forming a plurality of second bonding wires, so as to respectively connect the transfer bonding pads and the inner leads.   
     
     
         12 . The method of fabricating the chip package structure as claimed in  claim 11 , further comprising forming an encapsulant, so as to cover the active surface, the die pad, the inner leads, the bus bar, the first bonding wires and the second bonding wires.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.