Bond finger on via substrate, process of making same, package made thereby, and method of assembling same

Abstract

A wire-bonding substrate is disclosed. The wire-bonding substrate includes a first wire-bond pad and a first via that is disposed directly below the first wire-bond pad in the in the wire-bonding substrate. A package is also disclosed that includes a die that is coupled to the first wire-bonding pad. The package can include a larger substrate that is coupled to the wire-bonding substrate through an electrical connection such as a solder ball. A process of forming the wire-bonding substrate is also disclosed. The process includes via formation to stop on the wire-bond pad. A method of assembling a microelectronic package is also disclosed that includes coupling the die to the wire-bond pad. A computing system is also disclosed that includes the wire-bonding substrate.

1 . An article comprising: 
 a wire-bonding mounting substrate including an upper protective layer and a lower protective layer;    a first wire-bond pad disposed upon the upper protective layer;    a first via in the wire-bonding mounting substrate, wherein the first via is in electrical contact with the first wire-bond pad, wherein the first via includes a liner that is electrically conductive, wherein the first via penetrates the upper protective layer and the lower protective layer, and wherein the first via is disposed symmetrically and directly below the first wire-bond pad; and    an interconnect filling the via.    
     
     
         2 . The article of  claim 1 , wherein the wire-bonding mounting substrate includes a first edge, the article further including: 
 a second wire-bond pad disposed upon the first surface;    a second via in the wire-bonding mounting substrate, wherein the second via is in electrical contact with the second wire-bond pad, and wherein the second via is disposed directly below the second wire-bond pad; and    wherein the first via and the second via are staggered with respect to the first edge of the wire-bonding mounting substrate.    
     
     
         3 . The article of  claim 1 , wherein the via includes a liner that is electrically conductive.  
     
     
         4 . The article of  claim 1 , further including: 
 an interconnect filling the via.    
     
     
         5 . The article of  claim 1 , wherein the via includes a liner, further including: 
 an interconnect filling the via.    
     
     
         6 . The article of  claim 1 , wherein the wire-bond pad includes a first layer and a second layer, wherein at least one of the first layer and the second layer is selected from a precious metal, a precious metal alloy, silver, gold, platinum, nickel, palladium, platinum, cobalt, rhodium, iridium, and combinations thereof.  
     
     
         7 . The article of  claim 1 , wherein the wire-bond pad includes a first layer and a second layer, and wherein the second layer is one of identical material to the first layer, or at least one of a more noble, or a softer metal than the first layer.  
     
     
         8 . A package comprising: 
 a wire-bonding mounting substrate including an upper protective layer and a lower protective layer;    a first wire-bond pad disposed upon the upper protective layer;    a first via in the wire-bonding mounting substrate, wherein the first via is in electrical contact with the first wire-bond pad, wherein the first via includes a liner that is electrically conductive, wherein the first via penetrates the upper protective layer and the lower protective layer, and wherein the first via is disposed symmetrically and directly below the first wire-bond pad;    an interconnect filling the first via;    a die disposed above the upper protective layer; and    a first wire bond that couples the die to the first wire-bond pad.    
     
     
         9 . The package of  claim 8 , further including: 
 a second wire-bond pad disposed upon the first surface;    a second via in the wire-bonding mounting substrate, wherein the second via is in electrical contact with the second wire-bond pad, and wherein the second via is disposed directly below the second wire-bond pad.    
     
     
         10 . The package of  claim 8  further including: 
 a second wire-bond pad disposed upon the first surface;    a second via in the wire-bonding mounting substrate, wherein the second via is in electrical contact with the second wire-bond pad, and wherein the second via is disposed directly below the second wire-bond pad;    a second bond wire that couples the die to the second wire-bond pad; and    wherein the respective lengths of the first bond wire and the second bond wire are adjusted so as to tune the package.    
     
     
         11 . The package of  claim 8 , further including: 
 a first bump coupled to the first via.    
     
     
         12 . The package of  claim 8 , further including: 
 a first bump coupled to the first via; and    a first trace that makes an electrical contact to the first bump.    
     
     
         13 . The package of  claim 8 , further including: 
 a first bump coupled to the first via; and    a larger substrate coupled to the first bump.    
     
     
         14 . The package of  claim 8 , wherein the first wire-bond pad is part of a plurality of wire-bond pads, and wherein each wire-bond pad is directly above a corresponding via from a plurality of vias.  
     
     
         15 . The package of  claim 8 , wherein the first wire-bond pad is part of a plurality of wire-bond pads, wherein each wire-bond pad is directly above a corresponding via from a plurality of vias, and wherein each via is coupled to a bump.  
     
     
         16 . The package of  claim 8 , wherein the first wire-bond pad is part of a plurality of wire-bond pads, wherein each wire-bond pad is directly above a corresponding via from a plurality of vias, wherein each via is coupled to a bump, and wherein each bump is directly below a corresponding via.  
     
     
         17 . A computing system comprising: 
 a wire-bonding mounting substrate including an upper protective layer and a lower protective layer;    a first wire-bond pad disposed upon the upper protective layer;    a first via in the wire-bonding mounting substrate, wherein the first via is in electrical contact with the first wire-bond pad, wherein the first via includes a liner that is electrically conductive, wherein the first via penetrates the upper protective layer and the lower protective layer, and wherein the first via is disposed symmetrically and directly below the first wire-bond pad;    a die disposed on the upper protective layer; and    dynamic random-access memory coupled to the die.    
     
     
         18 . The computing system of  claim 17 , wherein the computing system is disposed in one of a computer, a wireless communicator, a hand-held device, an automobile, a locomotive, an aircraft, a watercraft, and a spacecraft.  
     
     
         19 . The computing system of  claim 17 , wherein the die is selected from a data storage device, a digital signal processor, a micro controller, an application specific integrated circuit, and a microprocessor.  
     
     
         20 . A wire-bonding mounting substrate comprising: 
 an upper protective layer and a lower protective layer;    a first wire-bond pad disposed upon the upper protective layer; and    a first via in the wire-bonding mounting substrate, wherein the first via penetrates the upper protective layer and the lower protective layer, wherein the first via is in electrical contact with the first wire-bond pad, wherein the first via has a shape characteristic of formation from the lower protective layer and proceeding toward the upper protective layer, and wherein the first via is disposed symmetrically and directly below the first wire-bond pad.    
     
     
         21 . The wire-bonding mounting substrate of  claim 20 , further wherein the first via includes a liner that is electrically conductive.  
     
     
         22 . The wire-bonding mounting substrate of  claim 20 , further wherein the first via includes an interconnect filling the via.