US2008042240A1PendingUtilityA1

Semiconductor device and method of manufacturing the same

Assignee: JON YEOLPriority: Jun 13, 2005Filed: Oct 23, 2007Published: Feb 21, 2008
Est. expiryJun 13, 2025(expired)· nominal 20-yr term from priority
H10B 12/09H10B 12/00H10B 12/033
47
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Claims

Abstract

Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising: 
 a semiconductor substrate on which a cell area, a peripheral area and a boundary area separating the cell area and the peripheral area are defined;    a capacitor formed in the cell area and extending upwardly from the substrate, the capacitor including a lower electrode of a first conductive material, an upper electrode and a dielectric layer separating the lower electrode and the upper electrode;    a mold pattern in the peripheral area of the substrate; and    a dummy pattern in the boundary area of the substrate, the dummy pattern including an extended sidewall of the first conductive material wherein the extended sidewall forms a boundary for the mold pattern.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein: 
 the first conductive material is selected from a group consisting of polysilicon, metal silicides, metals, metal nitrides and combinations thereof; and    the mold pattern is formed from a silicon oxide layer.    
   
   
       3 . The semiconductor device according to  claim 1 , wherein: 
 the mold pattern has a first height H M ; and    the lower electrode has a second height H E , wherein the first height and the second height are substantially equal.    
   
   
       4 - 20 . (canceled)

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