US2008121932A1PendingUtilityA1

Active regions with compatible dielectric layers

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Assignee: RANADE PUSHKARPriority: Sep 18, 2006Filed: Sep 18, 2006Published: May 29, 2008
Est. expirySep 18, 2026(~0.2 yrs left)· nominal 20-yr term from priority
Inventors:Pushkar Ranade
H10P 14/6339H10P 95/064H10P 14/69398H10P 14/69396H10P 14/69395H10P 14/69393H10P 14/69392H10P 14/69391H10P 14/69215H10P 14/6934H10P 14/6309H10P 14/6308H10P 14/3422H10P 14/3421H10P 14/3418H10P 14/3416H10P 14/3411H10P 14/693H10P 14/68H10D 64/01358H10D 64/01356H10D 64/01336H10P 14/69433H10D 30/6744H10D 30/797H10D 64/017H10D 30/0275H10D 64/691H10D 62/824H10D 30/62H10D 84/834H10D 64/685H10D 64/683H10D 64/519H10D 64/259H10D 64/256H10D 64/021H10D 64/018H10D 64/015H10D 62/822H10D 62/151H10D 62/121H10D 62/116H10D 62/115H10D 62/85H10D 62/83H10D 62/82H10D 62/021H10D 30/6211H10D 30/751H10D 30/601H10D 30/0278H10D 30/024H10D 30/022H10D 30/021H10P 32/141
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Claims

Abstract

A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material. In another embodiment, a portion of the second semiconductor material is replaced with a third semiconductor material in order to impart uniaxial strain to the lattice structure of the second semiconductor material.

Claims

exact text as granted — not AI-modified
1 . A semiconductor structure comprising:
 a substrate comprised of a first semiconductor material;   an active region above said substrate, wherein said active region is comprised of a second semiconductor material, and wherein the composition of said second semiconductor material is different from that of said first semiconductor material; and   a dielectric layer directly above said active region, wherein said dielectric layer is comprised of a layer of oxide of said first semiconductor material directly above said active region.   
     
     
         2 . The semiconductor structure of  claim 1  wherein said first semiconductor material is comprised of silicon, and wherein said layer of oxide is selected from the group consisting of a layer of silicon dioxide or silicon oxy-nitride. 
     
     
         3 . The semiconductor structure of  claim 2  wherein the atomic concentration of silicon atoms in said first semiconductor material is greater than 97%. 
     
     
         4 . The semiconductor structure of  claim 1  wherein said second semiconductor material is comprised of a material selected from the group consisting of gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, indium antimonide, indium gallium arsenide, aluminum gallium arsenide, indium gallium phosphide, germanium or silicon/germanium with an atomic concentration of germanium atoms greater than 5%. 
     
     
         5 . The semiconductor structure of  claim 4  wherein said first semiconductor material is comprised of silicon, and wherein said layer of oxide is selected from the group consisting of a layer of silicon dioxide or silicon oxy-nitride. 
     
     
         6 . The semiconductor structure of  claim 1  wherein said dielectric layer further comprises a layer of a high-K dielectric material above said layer of oxide of said first semiconductor material. 
     
     
         7 . The semiconductor structure of  claim 6 , wherein said first semiconductor material is comprised of silicon, wherein said layer of oxide is selected from the group consisting of a layer of silicon dioxide or silicon oxy-nitride, and wherein said high-K dielectric material is selected from the group consisting of hafnium oxide, hafnium silicate, lanthanum oxide, zirconium oxide, zirconium silicate, tantalum oxide, barium strontium titanate, barium titanate, strontium titanate, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, lead zinc niobate or a combination thereof. 
     
     
         8 . A semiconductor device comprising:
 a substrate comprised of a first semiconductor material;   an active region above said substrate, wherein said active region is comprised of a second semiconductor material, and wherein the composition of said second semiconductor material is different from that of said first semiconductor material;   a gate dielectric layer directly above said active region, wherein said gate dielectric layer is comprised of a layer of oxide of said first semiconductor material directly above said active region;   a gate electrode above said gate dielectric layer;   a pair of tip extensions on either side of said gate electrode and in said active region;   a pair of gate isolation spacers adjacent to the sidewalls of said gate electrode and above said pair of tip extensions; and   a pair of source/drain regions on either side of said pair of gate isolation spacers and in said active region.   
     
     
         9 . The semiconductor device of  claim 8  wherein said first semiconductor material is comprised of silicon, and wherein said layer of oxide is selected from the group consisting of a layer of silicon dioxide or silicon oxy-nitride. 
     
     
         10 . The semiconductor device of  claim 9  wherein the atomic concentration of silicon atoms in said first semiconductor material is greater than 97%. 
     
     
         11 . The semiconductor device of  claim 8  wherein said second semiconductor material is comprised of a material selected from the group consisting of gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, indium antimonide, indium gallium arsenide, aluminum gallium arsenide, indium gallium phosphide, germanium or silicon/germanium with an atomic concentration of germanium atoms greater than 5%. 
     
     
         12 . The semiconductor device of  claim 11  wherein said first semiconductor material is comprised of silicon, and wherein said layer of oxide is selected from the group consisting of a layer of silicon dioxide or silicon oxy-nitride. 
     
     
         13 . The semiconductor device of  claim 8  wherein said gate dielectric layer further comprises a layer of a high-K dielectric material above said layer of oxide of said first semiconductor material. 
     
     
         14 . The semiconductor device of  claim 13 , wherein said first semiconductor material is comprised of silicon, wherein said layer of oxide is selected from the group consisting of a layer of silicon dioxide or silicon oxy-nitride, and wherein said high-K dielectric material is selected from the group consisting of hafnium oxide, hafnium silicate, lanthanum oxide, zirconium oxide, zirconium silicate, tantalum oxide, barium strontium titanate, barium titanate, strontium titanate, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, lead zinc niobate or a combination thereof. 
     
     
         15 . The semiconductor device of  claim 8  wherein said pair of source/drain regions is comprised of a third semiconductor material, and wherein the composition of said third semiconductor material is different from that of said second semiconductor material. 
     
     
         16 . A semiconductor device comprising:
 a substrate comprised of a first semiconductor material;   an active region above said substrate, wherein said active region is comprised of a second semiconductor material, and wherein the composition of said second semiconductor material is different from that of said first semiconductor material;   a gate dielectric layer above said active region;   a gate electrode above said gate dielectric layer;   a pair of tip extensions on either side of said gate electrode and in said active region;   a pair of gate isolation spacers adjacent to the sidewalls of said gate electrode and above said pair of tip extensions; and   a pair of source/drain regions on either side of said pair of gate isolation spacers and in said active region, wherein said pair of source/drain regions is comprised of a third semiconductor material, and wherein the composition of said third semiconductor material is different from that of said second semiconductor material.   
     
     
         17 . The semiconductor device of  claim 16  wherein the atomic concentration of silicon atoms in said first semiconductor material is greater than 97%. 
     
     
         18 . The semiconductor device of  claim 17  wherein said second semiconductor material is comprised of a material selected from the group consisting of gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, indium antimonide, indium gallium arsenide, aluminum gallium arsenide, indium gallium phosphide, germanium or silicon/germanium with an atomic concentration of germanium atoms greater than 5%. 
     
     
         19 . The semiconductor device of  claim 16 , wherein said gate dielectric layer is comprised of a material selected from the group consisting of silicon dioxide, silicon oxy-nitride, hafnium oxide, hafnium silicate, lanthanum oxide, zirconium oxide, zirconium silicate, tantalum oxide, barium strontium titanate, barium titanate, strontium titanate, yttrium oxide, aluminum oxide, lead scandium tantalum oxide, lead zinc niobate or a combination thereof. 
     
     
         20 .- 45 . (canceled)

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