Semiconductor device

Abstract

Even if it is a case where the silicide region of nickel or a nickel alloy is formed in the source and drain of n channel MISFET, the semiconductor device in which OFF leakage current does not increase easily is realized. The channel length direction of n channel MISFET where the silicide region of nickel or a nickel alloy was formed on the source and the drain is arranged so that it may become parallel to the crystal orientation <100> of a semiconductor substrate. Since it is hard to extend the silicide region of nickel or a nickel alloy in the direction of crystal orientation <100>, even if it is a case where the silicide region of nickel or a nickel alloy is formed in the source and drain of n channel MISFET, the semiconductor device in which OFF leakage current does not increase easily is obtained.

1 . A semiconductor device, comprising:
 a semiconductor substrate which has a main front surface whose plane direction is a surface (100); and   n channel MISFET (Metal Insulator Semiconductor Field Effect Transistor) formed over the main front surface;   wherein   the n channel MISFET includes a source and a drain which were formed in the main front surface, and a silicide region including nickel or nickel alloy formed in at least one front surface of the source and the drain; and   a channel length direction of the n channel MISFET has been arranged so that it may become parallel to a crystal orientation <100> of the semiconductor substrate.   
   
   
       2 . A semiconductor device, comprising:
 a semiconductor substrate which has a main front surface whose plane direction is a surface (100);   n channel MISFET (Metal Insulator Semiconductor Field Effect Transistor) formed over the main front surface; and   an element isolation film which is in the main front surface and was formed in a region around the n channel MISFET;   wherein   the n channel MISFET includes a source and a drain which were formed in the main front surface, and a silicide region including nickel or nickel alloy formed in at least one front surface of the source and the drain;   a front surface of a portion which adjoins the source and the drain in a channel width direction of the n channel MISFET among the element isolation films falls rather than a front surface of the source and the drain; and   a channel length direction of the n channel MISFET has been arranged so that it may become parallel to a crystal orientation <100> of the semiconductor substrate.   
   
   
       3 . A semiconductor device according to  claim 1 , wherein
 the silicide region is NiSi 2 .   
   
   
       4 . A semiconductor device according to  claim 1 , wherein
 at least a neighborhood of the main front surface in which the source and the drain were formed in the semiconductor substrate includes silicon and germanium.   
   
   
       5 . A semiconductor device according to  claim 1 , wherein
 the n channel MISFET includes further a laminated structure of a gate insulating film and a gate electrode formed over the main front surface, and a gate silicide region including nickel formed in a front surface of the gate electrode; and   the gate silicide region is NiSi.   
   
   
       6 . A semiconductor device, comprising:
 a semiconductor substrate which has a main front surface whose plane direction is a surface (100); and   a first and a second n channel MISFET (Metal Insulator Semiconductor Field Effect Transistor) which were formed over the main front surface;   wherein   the first n channel MISFET includes a first source and a first drain which were formed in the main front surface, and a first silicide region which was formed in at least one front surface of the first source and the first drain and including nickel;   the second n channel MISFET includes a second source and a second drain which were formed in the main front surface, and a second silicide region which was formed in at least one front surface of the second source and the second drain and including nickel;   each channel length direction of the first and the second n channel MISFET is arranged so that it may become parallel to a crystal orientation <100> of the semiconductor substrate;   the first silicide region is NiSi 2 ; and   the second silicide region is NiSi.   
   
   
       7 . A semiconductor device according to  claim 6 , wherein
 the first n channel MISFET includes further a first laminated structure of a first gate insulating film and a first gate electrode formed over the main front surface, and a first gate silicide region including nickel formed in a front surface of the first gate electrode;   the second n channel MISFET includes further a second laminated structure of a second gate insulating film and a second gate electrode formed over the main front surface, and a second gate silicide region including nickel formed in a front surface of the second gate electrode; and   the first and the second gate silicide region are NiSi.