Semiconductor device and a method for manufacturing the same

Abstract

Provided is a manufacturing method of a semiconductor device which has the following steps of forming a plurality of layered patterns obtained by stacking an insulating film, a conductor film for forming a floating gate electrode and another insulating film over a semiconductor substrate in the order of mention, forming sidewalls over the side surfaces of the plurality of layered patterns, removing a damage layer of the semiconductor substrate between any two adjacent layered patterns by dry etching, forming an insulating film over the semiconductor substrate between two adjacent layered patterns, and forming a plurality of assist gate electrodes over the insulating film between two adjacent layered patterns in self alignment therewith. According to the present invention, a semiconductor device having a flash memory has improved reliability.

1 . A manufacturing method of a semiconductor device equipped with a plurality of nonvolatile memory cells each comprising a plurality of first electrodes placed over a semiconductor substrate, a plurality of second electrodes disposed over the semiconductor substrate to cross the plurality of first electrodes, and a plurality of third electrodes for charge accumulation disposed at positions which lie between any two adjacent ones of the plurality of first electrodes and overlap with the plurality of second electrodes two-dimensionally,
 the method comprising the steps of:   (a) forming a first insulating film over the semiconductor substrate wherein said first insulating film has silicon oxide as a main component thereof;   (b) depositing, over the first insulating film, a third-electrode forming conductor film having polycrystalline silicon as a main component thereof;   (c) depositing a second insulating film over the third-electrode forming conductor film;   (d) patterning the second insulating film and the third-electrode forming conductor film to form a plurality of layered patterns having the second insulating film and the third-electrode forming conductor film;   (e) forming sidewalls over the side surfaces of each of the plurality of layered patterns;   (f) forming a third insulating film over the semiconductor substrate between any two adjacent ones of the plurality of layered patterns;   (g) depositing over the semiconductor substrate a first-electrode forming conductor film to fill the film between any two adjacent ones of the plurality of layered patterns;   (h) removing the first-electrode forming conductor film to leave the film between any two adjacent ones of the plurality of layered patterns, thereby forming the plurality of first electrodes between any two adjacent ones of the plurality of layered patterns in self alignment with the plurality of layered patterns;   (i) depositing a fourth insulating film over the semiconductor substrate to fill the film between any two adjacent ones of the plurality of layered patterns;   (j) removing the fourth insulating film to leave a portion of the fourth insulating film between any two adjacent ones of the plurality of layered patterns, thereby forming the pattern of the fourth insulating film over the plurality of first electrodes between any two adjacent ones of the plurality of layered patterns in self alignment with the plurality of layered patterns;   (k) removing the second insulating film;   (l) removing the exposed sidewalls;   (m) depositing a fifth insulating film over the semiconductor substrate;   (n) depositing a second-electrode forming conductor film over the fifth insulating film;   (o) patterning the second-electrode forming conductor film to form the plurality of second electrodes; and   (p) patterning the third-electrode forming conductor film with the plurality of second electrodes as a mask, thereby forming the plurality of third electrodes having a projecting cross-section permitting the plurality of third electrodes to be higher than the plurality of first electrodes in self alignment with the plurality of second electrodes.   
   
   
       2 . A manufacturing method of a semiconductor device according to  claim 1 , further comprising a step of:
 (q) after the step (e), etching the semiconductor substrate between any two adjacent ones of the plurality of layered patterns by from about 10 nm to 20 nm.   
   
   
       3 . A manufacturing method of a semiconductor device according to  claim 1 , wherein the second insulating film has silicon oxide as a main component and the fourth insulating film has silicon nitride as a main component. 
   
   
       4 . A manufacturing method of a semiconductor device according to  claim 1 , wherein the plurality of third electrodes have a columnar shape. 
   
   
       5 . A manufacturing method of a semiconductor device according to  claim 1 , wherein the plurality of first electrodes have a function of forming an inversion layer over the semiconductor substrate.