US2008257590A1PendingUtilityA1

High thermal conducting circuit substrate and manufacturing process thereof

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Assignee: HO CHUNG WPriority: Dec 6, 2005Filed: Feb 20, 2008Published: Oct 23, 2008
Est. expiryDec 6, 2025(expired)· nominal 20-yr term from priority
H10W 70/479H10W 70/6875H10H 20/858H05K 1/0204H05K 1/056H05K 2203/0369H05K 2201/09054H05K 2203/0323H05K 2201/10106H05K 2201/0355H05K 3/44
48
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Claims

Abstract

A manufacturing process of a high thermal conducting circuit substrate is provided. First, a metal core substrate is provided and then the metal core substrate is etched at different etching speeds. Afterwards, two insulating layers are formed respectively on two sides of the etched metal core substrate. In addition, as an option, two conducting layers are formed respectively on two sides of the metal core substrate and are on top of the insulting layers. The conducting layers are patterned according to designs appropriate for the products. Because the high thermal conducting circuit substrate fabricated as the aforementioned manufacturing process mainly comprises the metal core substrate, it helps to elevate the thermal conduction of the circuit substrate itself.

Claims

exact text as granted — not AI-modified
1 - 14 . (canceled) 
   
   
       15 . A high thermal conducting circuit substrate, comprising:
 a metal core substrate, divided into a patterned upper layer, a patterned lower layer and a middle layer stacked alternately, wherein the middle layer is between the upper layer and the lower layer, the upper layer comprises at least a first metal post, an end of the first metal post farther from the middle layer is used as a first bonding pad, the lower layer comprises at least a second metal post, and an end of the second metal post farther from the middle layer is used as a second bonding pad;   a first insulating layer disposed on a surface of the middle layer and complementary to the upper layer; and   a second insulating layer disposed on another surface of the middle layer and complementary to the lower layer.   
   
   
       16 . The high thermal conducting circuit substrate as claimed in  claim 15 , further comprising:
 a patterned first conductive layer, disposed on a surface of the first insulating layer.   
   
   
       17 . The high thermal conducting circuit substrate as claimed in  claim 16 , further comprising:
 a patterned second conductive layer, disposed on a surface of the second insulating layer.   
   
   
       18 . The high thermal conducting circuit substrate as claimed in  claim 17 , further comprising a conductive channel, which penetrates through the first insulating layer, the middle layer and a second insulating layer, wherein the conductive channel electrically connects the first conductive layer and the second conductive layer, but does not electrically connect with the middle layer. 
   
   
       19 . The high thermal conducting circuit substrate as claimed in Claim  17 , further comprising a conductive channel, which penetrates through the first insulating layer, the metal core substrate and a second insulating layer, wherein the conductive channel electrically connect with the first conductive layer, the second conductive layer, and the middle layer. 
   
   
       20 . The high thermal conducting circuit substrate as claimed in  claim 15 , wherein the first bonding pad is a chip bonding pad, a flip chip bump pad or a wire bonding pad. 
   
   
       21 . The high thermal conducting circuit substrate as claimed in  claim 15 , wherein the second bonding pad is a power supply pad, a ground pad or a signal pad. 
   
   
       22 . A high thermal conducting circuit substrate, comprising:
 a metal core substrate divided into a patterned upper layer, a patterned lower layer and a middle layer stacked alternately, wherein the middle layer is between the upper layer and the lower layer, the middle layer comprises a plurality of traces, the upper layer comprises a plurality of first metal posts which connect respectively to a surface of the traces, the lower layer comprises a plurality of second metal posts which connect respectively to another surface of these traces;   a first insulating layer disposed on a surface of the middle layer and complementary to the upper layer, the first insulating layer further exposing an end of each first metal post farther from the middle layer, and the ends of the first metal posts serve as a plurality of first bonding pads; and   a second insulating layer disposed on another surface of the middle layer and complementary to the lower layer, the second insulating layer further exposing an end of the second metal posts that is farther from the middle layer, and the end serves as a plurality of second bonding pads.   
   
   
       23 . The high thermal conducting circuit substrate as claimed in  claim 22 , wherein one of the first bonding pads is a chip bonding pad, a flip chip bump pad or a wire bonding pad. 
   
   
       24 . The high thermal conducting circuit substrate as claimed in  claim 23 , wherein one of the second bonding pads is a power supply pad, a ground pad or a signal pad.

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