US2008298719A1PendingUtilityA1

Sub-resolution alignment of images

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Assignee: DCG SYSTEMS INCPriority: May 30, 2001Filed: Jun 23, 2008Published: Dec 4, 2008
Est. expiryMay 30, 2021(expired)· nominal 20-yr term from priority
G06T 7/001G06V 10/24G06T 7/32G06T 2207/30148
45
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Claims

Abstract

A plurality of images, including a first image and a second image having a higher resolution than the first image, are aligned by generating an oversampled cross correlation image that corresponds to relative displacements of the first and second images, and, based on the oversampled cross correlation image, determining an offset value that corresponds to a misalignment of the first and second images. The first and second images are aligned to a precision greater than the resolution of the first image, based on the determined offset value. Enhanced results are achieved by performing another iteration of generating an oversampled cross correlation image and determining an offset value for the first and second images. Generating the oversampled cross correlation image may involve generating a cross correlation image that corresponds to relative displacements of the first and second images, and oversampling the cross correlation image to generate the oversampled cross correlation image.

Claims

exact text as granted — not AI-modified
1 .- 93 . (canceled) 
   
   
       94 . A method for aligning images of an integrated circuit comprising:
 acquiring an image of the integrated circuit under test;   applying a point spread function to a computer aided design image of the integrated circuit, wherein the point spread function is characteristic of a system that acquires the acquired image, to generate a modified image; and   registering the acquired image with the modified image.   
   
   
       95 . The method of  claim 94 , wherein the acquired image is one of an optical image, an infrared image, a voltage contrast image, a scanning electron microscope image, a focused ion beam image, and an electron beam prober image. 
   
   
       96 . The method of  claim 94 , further comprising assigning gray levels to layers of the computer aided design image. 
   
   
       97 . The method of  claim 96 , wherein assigning gray levels to layers of the computer aided design image data comprises matching intensities of the gray levels with regions of the acquired image. 
   
   
       98 . The method of  claim 96 , wherein assigning gray levels to layers of the computer aided design image data comprises assigning gray levels according to differing regions of the integrated circuit in the acquired image. 
   
   
       99 . The method of  claim 98 , wherein one of the differing regions is a diffusion region. 
   
   
       100 . The method of  claim 98 , wherein one of the differing regions is a metal region. 
   
   
       101 . The method of  claim 98 , further comprising locating a circuit element on a substrate of the integrated circuit. 
   
   
       102 . The method of  claim 94 , further comprising locating a circuit element on a substrate of the integrated circuit. 
   
   
       103 . The method of  claim 102 , further comprising probing the circuit element. 
   
   
       104 . The method of  claim 96 , further comprising selecting one of the layers based on an analysis of the applied gray levels. 
   
   
       105 . The method of  claim 94 , wherein the image is acquired from a silicon side of the integrated circuit. 
   
   
       106 . The method of  claim 94 , wherein the image is acquired from a front side of the integrated circuit. 
   
   
       107 . The method of  claim 94 , wherein registering the acquired image with the modified image comprises automatically registering the acquired image with the modified image. 
   
   
       108 . The method of  claim 96 , further comprising automatically selecting one of the layers based on the applied gray levels. 
   
   
       109 . A machine-readable storage device that provides executable instructions which, when executed by a programmable processor, cause the processor to perform a method comprising:
 acquiring an image of the integrated circuit under test;   applying a point spread function to a computer aided design image of the integrated circuit, wherein the point spread function is characteristic of a system that acquires the acquired image, to generate a modified image; and   registering the acquired image with the computer aided design image.   
   
   
       110 . The machine-readable storage device of  claim 109 , wherein the acquired image is one of an optical image, an infrared image, a voltage contrast image, a scanning electron microscope image, a focused ion beam image and an electron beam prober image. 
   
   
       111 . The machine-readable storage device of  claim 109 , further comprising assigning gray levels to layers of the computer aided design image. 
   
   
       112 . The machine-readable storage device of  claim 111 , wherein assigning gray levels to layers of the computer aided design image data comprises matching intensities of the gray levels with regions of the acquired image. 
   
   
       113 . The machine-readable storage device of  claim 111 , wherein assigning gray levels to layers of the computer aided design image data comprises assigning gray levels to areas of the integrated circuit based on the acquired image. 
   
   
       114 . The machine-readable storage device of  claim 113 , wherein one of the regions is a diffusion region. 
   
   
       115 . The machine-readable storage device of  claim 113 , wherein one of the regions is a metal region. 
   
   
       116 . The machine-readable storage device of  claim 113 , further comprising locating a circuit element on a substrate of the integrated circuit. 
   
   
       117 . The machine-readable storage device of  claim 109 , further comprising locating a circuit element on a substrate of the integrated circuit. 
   
   
       118 . The machine-readable storage device of  claim 111 , further comprising selecting one of the layers based on an analysis of the applied gray levels. 
   
   
       119 . The machine-readable storage device of  claim 109 , wherein the image is acquired from a silicon side of the integrated circuit. 
   
   
       120 . The machine-readable storage device of  claim 109 , wherein the image is acquired from a front side of the integrated circuit.

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