Carrier used for deposition of materials on a non-planar surface

Abstract

A carrier for effectuating semiconductor processing on a non-planar substrate is disclosed. The carrier is configured for holding at least one non-planar substrate throughout a semiconductor processing step and concurrently rotating non-planar substrates as they travel down a translational path of a processing chamber. As the non-planar substrates simultaneously rotate and translate down a processing chamber, the rotation exposes the whole or any desired portion of the surface area of the non-planar substrates to the deposition process, allowing for uniform deposition as desired. Alternatively, any predetermined pattern is able to be exposed on the surface of the non-planar substrates. Such a carrier effectuates manufacture of non-planar semiconductor devices, including, but not limited to, non-planar light emitting diodes, non-planar photovoltaic cells, and the like.

1 . A carrier for carrying at least one semiconductor substrate through a processing chamber in a translational path comprising a rotating mechanism for rotating the at least one semiconductor substrate. 
     
     
         2 . The carrier in  claim 1  wherein the at least one substrate is rotated concurrently as it is carried through a processing chamber. 
     
     
         3 . The carrier of  claim 1  wherein the at least one substrate is non-planar. 
     
     
         4 . The carrier of  claim 1  wherein a rate of rotation is determined as a function of variables from among a list comprising type and process temperature, deposited material, desired deposition thickness, ambient temperature within the process chamber, quality of a vacuum condition within the process chamber and desired deposition area. 
     
     
         5 . The carrier of  claim 1  wherein the processing chamber comprises a semiconductor processing chamber. 
     
     
         6 . The carrier of  claim 1  wherein a rate of translation is determined as a function of variables from among a list comprising type and process temperature, deposited material, desired deposition thickness, ambient temperature within the process chamber, quality of a vacuum condition within the process chamber and desired deposition area. 
     
     
         7 . The carrier of  claim 5  wherein the semiconductor processing chamber is any among a list comprised of a sputter deposition chamber, a reactive sputter deposition chamber, and an evaporation deposition chamber. 
     
     
         8 . The carrier of  claim 1  wherein the rotating mechanism rotates the at least one semiconductor substrate about a lengthwise axis. 
     
     
         9 . A carrier for carrying at least one non-planar substrate through a processing chamber comprising:
 a. a frame;   b. a roller, wherein the roller is rotatably coupled to the frame;   c. a gear, wherein the gear is rotatably coupled to the frame such that the gear rotates as the roller rotates; and,   d. a shaft coupled on a first end to the roller and the gear and coupled on a second end to at least one non-planar substrate effectuating rotation of the at least one non-planar substrate as the roller and gear rotates.   
     
     
         10 . The carrier of  claim 9  wherein the roller comprises a groove configured to receive a track in a processing chamber, wherein the track travels along a translational path. 
     
     
         11 . The carrier of  claim 9  wherein the shaft is coupled to the at least one non-planar substrate by a sleeve configured to fit tightly over an end of the at least one non-planar substrate such as to effectuate sufficient torque for the shaft to rotate the non-planar substrate. 
     
     
         12 . The carrier of  claim 9  wherein the at least one non-planar substrate is a semiconductor substrate. 
     
     
         13 . The carrier of  claim 9  wherein the roller is coupled to a belt effectuating rotation of the rollers. 
     
     
         14 . A method of forming a semiconductor device, comprising:
 a. providing a semiconductor process chamber having an ingress and an egress, wherein the ingress and egress are operable to allow passage of a carrier carrying at least one non-planar substrate therethrough;   b. moving the carrier through the semiconductor process chamber, wherein moving comprises:
 i. rotating the at least one non-planar substrate within the carrier; and 
 ii. translating the carrier down a translational path through the semiconductor process chamber; and 
   c. concurrently while moving the carrier through the semiconductor process chamber, performing at least one semiconductor process on the at least one non-planar substrate.   
     
     
         15 . The method of  claim 14  wherein a path between the ingress and egress is the translational path. 
     
     
         16 . The method of  claim 14  wherein a rate of rotation is determined as a function of variables from among a list comprised of type and process temperature, deposited material, desired deposition thickness, ambient temperature within the process chamber, quality of a vacuum condition within the process chamber and desired deposition area. 
     
     
         17 . The method of  claim 14  wherein a rate of translation is determined as a function of variables from among a list comprised of type and process temperature, deposited material, desired deposition thickness, ambient temperature within the process chamber, quality of a vacuum condition within the process chamber and desired deposition area. 
     
     
         18 . The method of  claim 14  wherein the semiconductor process chamber comprises a deposition chamber. 
     
     
         19 . The method of  claim 14  wherein the rotation comprises rotating the at least one non-planar substrate about a lengthwise axis. 
     
     
         20 . A method of depositing material on a non-planar surface, comprising:
 a. providing a deposition chamber having an ingress and an egress, wherein the ingress and egress are operable to allow passage of a carrier carrying at least one non-planar substrate therethrough;   b. moving the at carrier down a translational path through the deposition chamber; and   c. rotating the at least one non-planar substrate as the carrier moves down the translational path through the deposition chamber; and,   d. performing at least one semiconductor deposition on the at least one non-planar substrate concurrently with the rotation of the at least one non-planar substrate down the translational path such that at least a portion of the surface area of the at least one non-planar substrate is exposed to the semiconductor deposition.   
     
     
         21 . The method of  claim 20  wherein a path between the ingress and egress is the translational path. 
     
     
         22 . The method of  claim 20  wherein a rate of rotation is determined as a function of variables from among a list comprised of type and process temperature, deposited material, desired deposition thickness, ambient temperature within the process chamber, quality of a vacuum condition within the process chamber and desired deposition area. 
     
     
         23 . The method of  claim 20  wherein a rate of translation is determined as a function of variables from among a list comprised of type and process temperature, deposited material, desired deposition thickness, ambient temperature within the process chamber, quality of a vacuum condition within the process chamber and desired deposition area. 
     
     
         24 . The method of  claim 20  wherein rotating comprises rotating the at least one non-planar substrate about a lengthwise axis.