US2009021981A1PendingUtilityA1

Nonvolatile memory device including circuit formed of thin film transistors

Assignee: RENESAS TECH CORPPriority: Sep 16, 2003Filed: Sep 16, 2008Published: Jan 22, 2009
Est. expirySep 16, 2023(expired)· nominal 20-yr term from priority
G11C 16/344G11C 16/3477G11C 16/345G11C 16/0416G11C 2207/005G11C 16/12G11C 7/06G11C 7/02G11C 11/14G11C 16/06
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Claims

Abstract

A transistor is arranged for electrically isolating a sense amplifier formed of a thin film transistor from a data line electrically coupled to the sense amplifier. When a write driver drives the data line, a control signal is applied to isolate the data line from the sense amplifier.

Claims

exact text as granted — not AI-modified
1 - 8 . (canceled) 
   
   
       9 . A nonvolatile memory device comprising:
 a memory array having a plurality of memory cells arranged in rows and columns;   a data line transmitting write data and read data for said memory array;   a column decoder executing a column select operation in said memory array, in response to an address instruction from an outside;   a column select gate electrically coupling a selected memory cell in said memory array, to said data line; and   a gate driver driving said column select gate in response to an instruction from said column decoder, wherein   said gate driver drives said column select gate by using as an operation voltage a predetermined voltage not more than a boosted voltage applied to the selected memory cell in a read operation, in response to an instruction from said column decoder in said read operation.   
   
   
       10 . The nonvolatile memory device according to  claim 9 , wherein
 said operation voltage of said gate driver is set to be a voltage higher than said boosted voltage in a data write operation, and   said nonvolatile memory device further comprises a voltage adjusting circuit for setting said operation voltage of said gate driver to a voltage not more than said boosted voltage after the data write operation.   
   
   
       11 . The nonvolatile memory device according to  claim 10 , wherein said voltage adjusting circuit sets a voltage level lower than said boosted voltage by a threshold voltage of the transistor, after said data write operation.

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