US2009057645A1PendingUtilityA1

Memory element with improved contacts

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Individually held — no corporate assignee on recordPriority: Oct 1, 1997Filed: Oct 30, 2008Published: Mar 5, 2009
Est. expiryOct 1, 2017(expired)· nominal 20-yr term from priority
Inventors:Sergey KostylevStanford R. OvshinskyWolodymyr CzubatyjPatrick KlersyBoil Pashmakov
H10D 99/00G11C 11/56G11C 13/0004G11C 11/5678H10N 70/063H10N 70/066H10B 63/82H10N 70/8828H10B 63/30H10N 70/821H10N 70/8413H10N 70/231
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Claims

Abstract

A phase-change memory element comprising a phase-change memory material, a first electrical contact and a second electrical contact. At least one of the electrical contacts having a sidewall electrically coupled to the memory material.

Claims

exact text as granted — not AI-modified
1 . A memory element, comprising:
 a phase-change memory material; and   a first conductive layer in first electrical communication with said memory material, said first electrical communication enabling flow of a first current from said first conductive layer into said memory material, said first conductive layer having a first sidewall surface, essentially all of said first current flow from said first conductive layer into said memory material occurring across said first sidewall surface.   
     
     
         2 . The memory element of  claim 1 , wherein the height of said first sidewall surface corresponds to the thickness of said first conductive layer. 
     
     
         3 . The memory element of  claim 2 , wherein said first conductive layer has a thickness between 50 Å and 500 Å. 
     
     
         4 . The memory element of  claim 2 , wherein said first conductive layer has a thickness of less than 500 Å. 
     
     
         5 . The memory element of  claim 1 , wherein said first current flows across a sidewall surface of said memory material. 
     
     
         6 . The memory element of  claim 1 , wherein said first sidewall surface contacts said memory material. 
     
     
         7 . The memory element of  claim 6 , wherein said first sidewall surface contacts a sidewall surface of said memory material. 
     
     
         8 . The memory element of  claim 1 , wherein said phase-change memory material comprises a chalcogen element. 
     
     
         9 . The memory element of  claim 1 , further comprising a second conductive layer in second electrical communication with said memory material, said second electrical communication enabling flow of a second current from said memory material into said second conductive layer. 
     
     
         10 . The memory element of  claim 9 , wherein said second conductive layer has a second sidewall surface, essentially all of said second current flow from said memory material into said second conductive layer occurring across said second sidewall surface. 
     
     
         11 . The memory element of  claim 10 , wherein said second current flows across a sidewall surface of said memory material. 
     
     
         12 . The memory element of  claim 9 , wherein the height of said second sidewall surface corresponds to the thickness of said second conductive layer. 
     
     
         13 . The memory element of  claim 12 , wherein said second conductive layer has a thickness between 50 Å and 500 Å. 
     
     
         14 . The memory element of  claim 12 , wherein said second conductive layer has a thickness of less than 500 Å. 
     
     
         15 . The memory element of  claim 9 , wherein said second sidewall surface contacts said memory material. 
     
     
         16 . The memory element of  claim 15 , wherein said second sidewall surface contacts a sidewall surface of said memory material. 
     
     
         17 . The memory element of  claim 9 , wherein said second conductive layer is spacedly disposed from said first conductive layer. 
     
     
         18 . The memory element of  claim 17 , further comprising a dielectric material interposed between said first conductive layer and said second conductive layer. 
     
     
         19 . The memory element of  claim 1 , further comprising a substrate, said substrate supporting said memory material and said first conductive layer. 
     
     
         20 . The memory element of  claim 19 , wherein said first sidewall surface is oriented in a direction perpendicular to said substrate and substantially all of said first current flow across said first sidewall surface occurs in a direction parallel to said substrate. 
     
     
         21 . The memory element of  claim 19 , wherein said first conductive layer contacts said substrate, said first conductive layer having an opening therein, said opening exposing said substrate, the boundary of said opening including said first sidewall surface, the height of said first sidewall surface corresponding to the thickness of said first conductive layer, said memory material occupying said opening. 
     
     
         22 . The memory element of  claim 21 , wherein said memory material contacts said first sidewall surface. 
     
     
         23 . The memory element of  claim 19 , further comprising a first dielectric layer formed over said substrate, said first conductive layer being formed over said first dielectric layer and having an opening therein, said opening exposing said first dielectric layer, the boundary of said opening including said first sidewall surface, the height of said first sidewall surface corresponding to the thickness of said first conductive layer, said memory material occupying said opening. 
     
     
         24 . The memory element of  claim 23 , wherein said memory material contacts said first sidewall surface.

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