Semiconductor device and method of manufacturing the same

Abstract

A method of manufacturing a semiconductor device including a complementary metal oxide semiconductor (CMOS) and a bipolar junction transistor (BJT), the method comprising the steps of: forming a gate oxide layer on a substrate having a p-type and an n-type well; removing the gate oxide layer on the p-type well; forming bases on the p-type well; forming a first photosensitive layer pattern that exposes the bases on the substrate; implanting p-type impurity ions into the bases through the first photosensitive layer pattern; removing the first photosensitive layer pattern; forming a second photosensitive layer pattern that exposes the p-type and the n-type wells; and implanting n-type impurity ions into the p-type and the n-type wells through the second photosensitive layer pattern to form an emitter and a collector, respectively, to form the BJT. Therefore, CMOS manufacturing processes are used to form a high frequency BJT having improved frequency and noise characteristics.

1 - 5 . (canceled) 
   
   
       6 . A semiconductor device, comprising:
 a substrate including a p-type well in which an emitter is formed and an n-type well in which a collector is formed;   bases formed on the p-type well;   an insulating layer formed on the bases and the substrate;   contact holes formed in the insulating layer on the emitter, the bases, and the collector; and   an emitter contact, base contacts, and a collector contact, connected to the emitter, the bases, and the collector, respectively, and filling the respective contact holes.   
   
   
       7 . The semiconductor device of  claim 6 , wherein the bases into which p-type impurity ions are implanted are formed of polysilicon. 
   
   
       8 . The semiconductor device of  claim 6 , wherein n-type impurity ions are implanted into the emitter and the collector. 
   
   
       9 . The semiconductor device of  claim 6 , wherein the bases and the p-type well are electrically connected to each other. 
   
   
       10 . The semiconductor device of  claim 6 , wherein the bases are formed directly on the p-type well. 
   
   
       11 . The semiconductor device of  claim 6 , wherein the emitter is formed between two adjacent bases. 
   
   
       12 . The semiconductor device of  claim 6 , further including side wall spacers formed on side walls of each of the bases. 
   
   
       13 . A semiconductor device comprising:
 a complementary metal oxide semiconductor (CMOS); and   a bipolar junction transistor (BJT),   wherein the bipolar junction transistor comprises:
 a substrate including a p-type well in which an emitter is formed and an n-type well in which a collector is formed; 
 a plurality of bases formed on the p-type well; 
 an insulating layer formed on the bases and the substrate; 
 contact holes formed in the insulating layer on the emitter, the bases, and the collector; and 
 an emitter contact, base contacts, and a collector contact, respectively connected to the emitter, the bases, and the collector, and filing the respective contact holes. 
   
   
   
       14 . The semiconductor device of  claim 13 , wherein the bases into which p-type impurity ions are implanted are formed of polysilicon. 
   
   
       15 . The semiconductor device of  claim 13 , wherein n-type impurity ions are implanted into the emitter and the collector. 
   
   
       16 . The semiconductor device of  claim 13 , wherein the bases and the p-type well are electrically connected to each other. 
   
   
       17 . The semiconductor device of  claim 13 , wherein the bases are formed directly on the p-type well. 
   
   
       18 . The semiconductor device of  claim 13 , wherein the emitter is formed between two adjacent bases. 
   
   
       19 . The semiconductor device of  claim 13 , wherein the bipolar junction transistor further includes side wall spacers formed on side walls of each of the bases.