Thermally enhanced thin semiconductor package

Abstract

A semiconductor die package is disclosed. The semiconductor die package includes a semiconductor die comprising an input at a first top semiconductor die surface and an output at a second bottom semiconductor die surface. A leadframe having a first leadframe surface and a second leadframe surface opposite the first leadframe surface is in the semiconductor die package and is coupled to the first top semiconductor die surface. A clip having a first clip surface and a second clip surface is coupled to the second bottom semiconductor die surface. A molding material having exterior molding material surfaces covers at least a portion of the leadframe, the clip, and the semiconductor die. The first leadframe surface and the first clip surface are exposed by the molding material, and the first leadframe surface, the first clip surface, and the exterior molding material surfaces of the molding material form exterior surfaces of the semiconductor die package.

1 . A semiconductor die package comprising:
 a semiconductor die comprising an input at a first top semiconductor die surface and an output at a second bottom semiconductor die surface;   a leadframe having a first leadframe surface and a second leadframe surface opposite the first leadframe surface, wherein the second leadframe surface is coupled to the first top semiconductor die surface;   a clip having a first clip surface and a second clip surface, wherein the second clip surface is coupled to the second bottom semiconductor die surface; and   a molding material having exterior molding material surfaces and covering at least a portion of the leadframe, the clip, and the semiconductor die,   wherein the first leadframe surface and the first clip surface are exposed by the molding material, and wherein the first leadframe surface, the first clip surface, and the exterior molding material surfaces of the molding material form exterior surfaces of the semiconductor die package.   
     
     
         2 . The semiconductor die package of  claim 1  wherein the semiconductor die comprises a vertical device. 
     
     
         3 . The semiconductor die package of  claim 1  wherein the first leadframe surface defines a protruding leadframe portion of the leadframe. 
     
     
         4 . The semiconductor die package of  claim 3  wherein the first clip surface defines a protruding clip portion of the clip. 
     
     
         5 . The semiconductor die package of  claim 3  wherein exterior surfaces of the molding material are substantially coplanar with the first clip surface and the first leadframe surface, and wherein the molding material covers edges of the protruding leadframe portion and the protruding clip portion. 
     
     
         6 . The semiconductor die package of  claim 1  wherein the semiconductor die is coupled to the leadframe using solder. 
     
     
         7 . The semiconductor die package of  claim 1  wherein the solder comprises a high temperature solder material and a low temperature solder material. 
     
     
         8 . The semiconductor die package of  claim 1  wherein the semiconductor die comprises a trenched gate. 
     
     
         9 . The semiconductor die package of  claim 1  wherein the leadframe comprises copper or a copper alloy. 
     
     
         10 . A system comprising the semiconductor die package of  claim 1 . 
     
     
         11 . A method for forming a semiconductor die package, the method comprising:
 obtaining a semiconductor die comprising an input at a first top semiconductor die surface and an output at a second bottom semiconductor die surface;   attaching a leadframe having a first leadframe surface and a second leadframe surface opposite the first leadframe surface to the semiconductor die, wherein the second leadframe surface is coupled to the first top semiconductor die surface;   attaching a clip having a first clip surface and a second clip surface, wherein the second clip surface is coupled to the second bottom semiconductor die surface; and   molding a molding material around at least a portion of the leadframe, the clip, and the semiconductor die,   wherein after molding, the first leadframe surface and the first clip surface are exposed by the molding material, and wherein the first leadframe surface, the first clip surface, and the exterior molding material surfaces of the molding material form exterior surfaces of the semiconductor die package.   
     
     
         12 . The method of  claim 11  wherein attaching the leadframe to the semiconductor die comprises using solder to attach the leadframe to the semiconductor die. 
     
     
         13 . The method of  claim 11  wherein attaching the clip to the semiconductor die comprises using solder to attach the clip to the semiconductor die. 
     
     
         14 . The method of  claim 11  further comprising, prior to attaching the leadframe to the semiconductor die, partially etching the leadframe to form a protruding portion comprising the first leadframe surface. 
     
     
         15 . The method of  claim 14  further comprising, prior to attaching the clip to the semiconductor die, partially etching the clip to form a protruding portion comprising the first clip surface. 
     
     
         16 . The method of  claim 14  wherein molding comprises using a molding tool with molding dies that contact surfaces of the clip and the leadframe. 
     
     
         17 . The method of  claim 14  wherein the semiconductor die comprises a vertical MOSFET. 
     
     
         18 . The method of  claim 14  wherein the leadframe comprises copper. 
     
     
         19 . The method of  claim 14  wherein attaching the leadframe to the semiconductor die occurs after attaching the clip to the semiconductor die. 
     
     
         20 . The method of  claim 14  wherein the semiconductor die package is in an array of semiconductor die packages when the semiconductor die package is formed.