Self-alignment scheme for a heterojunction bipolar transistor

Abstract

Embodiments herein present a structure, method, etc. for a self-alignment scheme for a heterojunction bipolar transistor (HBT). An HBT is provided, comprising an extrinsic base, a first self-aligned silicide layer over the extrinsic base, and a nitride etch stop layer above the first self-aligned silicide layer. A continuous layer is also included between the first self-aligned silicide layer and the nitride etch stop layer, wherein the continuous layer can comprise oxide. The HBT further includes spacers adjacent the continuous layer, wherein the spacers and the continuous layer separate the extrinsic base from an emitter contact. In addition, an emitter is provided, wherein the height of the emitter is less than or equal to the height of the extrinsic base. Moreover, a second self-aligned silicide layer is over the emitter, wherein the height of the second silicide layer is less than or equal to the height of the first silicide layer.

1 . A heterojunction bipolar transistor, comprising:
 an extrinsic base;   a self-aligned silicide layer over said extrinsic base;   a nitride etch stop layer above said self-aligned silicide layer; and   a continuous layer between said self-aligned silicide layer and said nitride etch stop layer.   
   
   
       2 . The heterojunction bipolar transistor according to  claim 1 , wherein said continuous layer comprises oxide. 
   
   
       3 . The heterojunction bipolar transistor according to  claim 1 , further comprising an emitter, wherein a height of said emitter is one of less than and equal to a height of said extrinsic base. 
   
   
       4 . The heterojunction bipolar transistor according to  claim 1 , further comprising:
 an emitter; and   a second self-aligned silicide layer over said emitter,   wherein a height of said second silicide layer is one of less than and equal to a height of said self-aligned silicide layer.   
   
   
       5 . A heterojunction bipolar transistor, comprising:
 an emitter;   an extrinsic base proximate said emitter; and   a self-aligned silicide layer over said extrinsic base,   wherein a height of said emitter is one of less than and equal to a height of said extrinsic base.   
   
   
       6 . The heterojunction bipolar transistor according to  claim 5 , further comprising a second self-aligned silicide layer over said emitter, wherein a height of said second silicide layer is one of less than and equal to a height of said self-aligned silicide layer. 
   
   
       7 . The heterojunction bipolar transistor according to  claim 5 , further comprising:
 a nitride etch stop layer above said self-aligned silicide layer; and   a continuous layer between said self-aligned silicide layer and said nitride etch stop layer.   
   
   
       8 . The heterojunction bipolar transistor according to  claim 7 , wherein said continuous layer comprises oxide. 
   
   
       9 . A method of forming a heterojunction bipolar transistor, comprising:
 forming spacers;   forming an extrinsic base adjacent said spacers;   using said spacers to form and self-align a first self-aligned silicide layer over said extrinsic base;   forming a continuous layer over said first self-aligned silicide layer; and   forming a nitride etch stop layer over said continuous layer.   
   
   
       10 . The method according to  claim 9 , further comprising forming spacers, wherein said forming of said continuous layer comprises forming said continuous layer adjacent said spacers such that said spacers and said continuous layer separate said extrinsic base from an emitter contact. 
   
   
       11 . The method according to  claim 9 , wherein said forming of said continuous layer comprises forming said continuous layer using oxide. 
   
   
       12 . The method according to  claim 9 , further comprising forming an emitter, wherein said forming of said extrinsic base comprises forming said extrinsic base with a height that is one of greater than and equal to a height of said emitter. 
   
   
       13 . The method according to  claim 9 , further comprising:
 forming an emitter; and   forming a second self-aligned silicide layer over said emitter, comprising forming said second silicide layer with a height that is one of less than and equal to a height of said first silicide layer.   
   
   
       14 . A method of forming a heterojunction bipolar transistor, comprising:
 forming an emitter;   forming an extrinsic base proximate said emitter, comprising forming said extrinsic base with a height that is one of greater than and equal to a height of said emitter; and   forming a first self-aligned silicide layer over said extrinsic base.   
   
   
       15 . The method according to  claim 14 , further comprising:
 forming a second self-aligned silicide layer over said emitter, comprising forming said second silicide layer with a height that is one of less than and equal to a height of said first silicide layer.   
   
   
       16 . The method according to  claim 14 , further comprising:
 forming a continuous layer over said extrinsic base; and   forming a nitride etch stop layer over said continuous layer.   
   
   
       17 . The method according to  claim 16 , further comprising forming spacers, wherein said forming of said continuous layer comprises forming said continuous layer adjacent said spacers such that said spacers and said continuous layer separate said extrinsic base from an emitter contact. 
   
   
       18 . The method according to  claim 14 , wherein said forming of said continuous layer comprises forming said continuous layer using oxide.