Method for Accounting for Process Variation in the Design of Integrated Circuits

Abstract

A method to simulate an electronic circuit includes determining process parameters and a process variation for each process parameter, and determining a value for each of a plurality of components of the circuit as a function of the process variations.

1 . A method to manufacture an electronic circuit comprising:
 determining process parameters and a process variation for a process parameter;   identifying a plurality of components, wherein a component is represented with a nominal value and a functional description;   determining a value for the plurality of components of the circuit from a function of the process variations; and   manufacturing the electronic circuit by modifying an electronic circuit design based upon the value to account for process variations, wherein the electronic circuit design corresponds to the electronic circuit.   
   
   
       2 . The method of  claim 1 , wherein each component value includes a nominal part and a variation part, each variation part representing a variation in the nominal value relative to a variation in one of the process parameters. 
   
   
       3 . The method of  claim 2 , wherein the variation part is represented as a vector of derivative values. 
   
   
       4 . The method of  claim 1  further comprising:
 determining a delay value for each of a plurality of circuit paths as a function of the process variations.   
   
   
       5 . The method of  claim 4  further comprising determining a delay value for one of the circuit paths as a function of component values associated with the path. 
   
   
       6 . The method of  claim 4  further comprising:
 determining timing values as a function of process parameters.   
   
   
       7 . The method of  claim 6 , wherein determining timing values comprises adding the delay values of the circuit paths, and determining which paths are critical. 
   
   
       8 . The method of  claim 6  further comprising:
 determining a yield of the circuit as a function of process parameters.   
   
   
       9 . The method of  claim 6 , wherein determining a yield comprises
 determining a fraction of a process space in which the critical paths work.   
   
   
       10 . The method of  claim 2 , further comprising
 reducing the variation part using compression to produce a compressed variation part.   
   
   
       11 . The method of  claim 10 , where the compressed variation part is used to analyze effects of process variations in an electronic circuit. 
   
   
       12 . The method of  claim 2 , further comprising:
 adjusting the values of the components by applying a context of the components to the function of the process variations; and   performing a hierarchical analysis of the electronic circuit using the adjusted values.   
   
   
       13 . An article of manufacture comprising a computer readable medium storing instructions which, when executed by a processing system, cause the system to perform a method to design an electronic circuit for manufacturing, the method comprising:
 determining process parameters and a process variation for a process parameter;   identifying a plurality of components, wherein a component is represented with a nominal value and a functional description; and   determining a value for each of a plurality of components of the circuit from a function of the process variations.   
   
   
       14 . The medium of  claim 13 , wherein each component value includes a nominal part and a variation part, each variation part representing a variation in the nominal value relative to a variation in one of the process parameters. 
   
   
       15 . The medium of  claim 13 , wherein the variation part is represented as a vector of derivative values. 
   
   
       16 . The medium of  claim 12 , wherein the instructions, when executed, cause the system to perform the method further comprising:
 determining a delay value for each of a plurality of circuit paths as a function of the process variations.   
   
   
       17 . The medium of  claim 16 , wherein the instructions, when executed, cause the system to perform the method further comprising:
 determining a delay value for one of the circuit paths as a function of component values associated with the path.   
   
   
       18 . The medium of  claim 16 , wherein the instructions, when executed, cause the system to perform the method further comprising:
 determining timing values as a function of process parameters.   
   
   
       19 . The medium of  claim 18 , wherein the instructions, when executed, cause the method to perform determining timing values by:
 adding the delay values of the circuit paths, and   determining which paths are critical.   
   
   
       20 . The medium of  claim 17 , wherein the instructions, when executed, cause the system to perform the method further comprising:
 determining a yield of the circuit as a function of process parameters.   
   
   
       21 . The medium of  claim 17 , wherein the instructions, when executed, cause the system to perform determining a yield by:
 determining a fraction of a process space in which the critical paths work.   
   
   
       22 . The medium of  claim 14 , wherein the instructions, when executed, cause the system to perform the method further comprising:
 reducing the variation part using compression to produce a compressed variation part.   
   
   
       23 . The medium of  claim 22 , wherein the compressed variation part is used to analyze effects of process variations in an electronic circuit. 
   
   
       24 . The medium of  claim 14 , wherein the instructions, when executed, cause the system to perform the method further comprising:
 adjusting the values of the components by applying a context of the components to the function of the process variations; and   performing a hierarchical analysis of the electronic circuit using the adjusted values.   
   
   
       25 . An apparatus to a design of an electronic circuit for manufacturing comprising:
 means for determining process parameters and a process variation for a process parameter;   means for identifying a plurality of components, wherein a component is represented with a nominal value and a functional description; and   means for determining a value for each of a plurality of components of the circuit from a function of the process variations.   
   
   
       26 . The apparatus of  claim 25 , wherein each component value includes a nominal part and a variation part, each variation part representing a variation in the nominal value relative to a variation in one of the process parameters. 
   
   
       27 . The apparatus of  claim 26 , wherein the variation part is represented as a vector of derivative values. 
   
   
       28 . The apparatus of  claim 25  further comprising:
 means for determining a delay value for each of a plurality of circuit paths as a function of the process variations.   
   
   
       29 . The apparatus of  claim 28  further comprising:
 means for determining a delay value for one of the circuit paths as a function of component values associated with the path.   
   
   
       30 . The apparatus of  claim 28  further comprising:
 means for determining timing values as a function of process parameters.   
   
   
       31 . The apparatus of  claim 30 , wherein said means for determining timing values comprises:
 means for adding the delay values of the circuit paths, and means for determining which paths are critical.   
   
   
       32 . The apparatus of  claim 30  further comprising:
 means for determining a yield of the circuit as a function of process parameters.   
   
   
       33 . The apparatus of  claim 30 , wherein said means for determining a yield comprises:
 means for determining a fraction of a process space in which the critical paths work.   
   
   
       34 . The apparatus of  claim 26 , further comprising
 means for reducing the variation part using compression to produce a compressed variation part.   
   
   
       35 . The apparatus of  claim 34 , further comprising:
 means for using the compressed variation part to analyze effects of process variations in an electronic circuit.   
   
   
       36 . The apparatus of  claim 26 , further comprising:
 means for adjusting the values of the components by applying a context of the components to the function of the process variations; and   means for performing a hierarchical analysis of the electronic circuit using the adjusted values.