Chip scale surface mount package for semiconductor device and process of fabricating the same

Abstract

A semiconductor package has contacts on both sides of the dice on a wafer scale. The back side of the wafer is attached to a metal plate. The scribe lines separating the dice expose the metal plate without extending through the metal plate. A metal layer may be formed on the front side of the dice, covering the exposed portions of the metal plate and extending to side edges of the dice. The metal layer may cover connection pads on the front side of the dice. A second set of scribe lines are made coincident with the first set. Therefore, the metal layer remains on the side edges of the dice coupling the front and the back. As a result, the package is rugged and provides a low-resistance electrical connection between the back and front sides of the dice.

1 . A package for a semiconductor device comprising:
 a die containing a semiconductor device, a front side of the die comprising a passivation layer and at least one connection pad, the connection pad being in electrical contact with the semiconductor device;   a conductive plate attached to a back side of the die, the conductive plate extending beyond a side edge of the die to form a protruding portion of the conductive plate; and   a metal layer extending from the protruding portion of the conductive plate, along the side edge of the die and onto the passivation layer, the metal layer being electrically insulated from the connection pad.   
     
     
         2 . The package of  claim 1  comprising a second metal layer in electrical contact with the connection pad. 
     
     
         3 . The package of  claim 1  wherein the metal layer comprises at least two metal sublayers, second metal sublayer overlying a first metal sublayer. 
     
     
         4 . The package of  claim 3  wherein the first metal sublayer is sputtered and the second metal sublayer is plated. 
     
     
         5 . The package of  claim 2  comprising at least a first solder post in contact with the metal layer and at least a second solder post in contact with the second metal layer. 
     
     
         6 . The package of  claim 2  comprising at least a first solder ball in contact with the metal layer and at least a second solder ball in contact with the second metal layer. 
     
     
         7 . The package of  claim 2  comprising at least a first conductive polymer ball in contact with the metal layer and at least a second conductive polymer ball in contact with the second metal layer. 
     
     
         8 . The package of  claim 1  wherein the conductive plate has a width X 2  greater than a width X 1  of the die. 
     
     
         9 . The package of  claim 1  wherein the die comprises a vertical power MOSFET. 
     
     
         10 . The package of  claim 1  wherein the die comprises a diode. 
     
     
         11 . The package of  claim 1  wherein the die comprises a bipolar transistor. 
     
     
         12 . The package of  claim 1  wherein the die comprises a JFET. 
     
     
         13 . The package of  claim 1  wherein the die comprises a IC. 
     
     
         14 . A package for a MOSFET comprising:
 a semiconductor die containing a MOSFET and having a width X 2 , a front side of the die comprising a source connection pad in electrical contact with a source terminal and a gate connection pad in electrical contact with a gate terminal, a back side of the die comprising a drain terminal;   a conductive substrate having a width X 1  greater than X 2  and being attached to the back side of the die and in electrical contact with the drain terminal;   a drain metal layer in contact with a protruding portion of the conductive substrate and extending along an edge of the die and covering a portion of a passivation layer on the front side of the die;   a source metal layer in electrical contact with the source connection pad; and   a gate metal layer in electrical contact with the gate connection pad.   
     
     
         15 . The package of  claim 14  further comprising at least one solder post in contact with the source metal layer, at least one solder post in contact with the gate metal layer, and at least one solder post in contact with the drain metal layer. 
     
     
         16 . The package of  claim 14  further comprising at least one solder ball in contact with the source metal layer, at least one solder ball in contact with the gate metal layer, and at least one solder ball in contact with the drain metal layer. 
     
     
         17 . The package of  claim 14  further comprising at least one conductive polymer ball in contact with the source metal layer, at least one conductive polymer ball in contact with the gate metal layer, and at least one conductive polymer ball in contact with the drain metal layer. 
     
     
         18 . A package for a semiconductor device comprising:
 a die containing a semiconductor device, a front side of the die comprising a passivation layer and at least one connection pad, the connection pad being in electrical contact with the semiconductor device;   a conductive plate attached to a back side of the die, the conductive plate extending beyond a side edge of the die to form a protruding portion of the conductive plate, wherein the conductive plate has a width X 2  greater than a width X 1  of the die; and   a metal layer extending from the protruding portion of the conductive plate, along the side edge of the die and onto the passivation layer, the metal layer being electrically insulated from the connection pad, wherein the metal layer comprises at least two metal sublayers, a second metal sublayer overlying a first metal sublayer; and   a second metal layer in electrical contact with the connection pad.   
     
     
         19 . The package of  claim 18  wherein the first metal sublayer is sputtered and the second metal sublayer is plated. 
     
     
         20 . The package of  claim 18  wherein the die comprises a vertical power MOSFET.