Mosfets including crystalline sacrificial structures

Abstract

A sub-micron channel length MOSFET includes a seamless epitaxial channel region in a substrate of the MOSFET and a buried device isolation layer beneath the seamless epitaxial channel region. In some embodiments according to the invention, a buried device isolation layer includes the buried device isolation layer beneath a central portion of the seamless epitaxial channel and absent from sidewalls of source/drain regions of the MOSFET.

1 . A Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) comprising:
 a seamless epitaxial channel region in a substrate of a sub-micron channel length MOSFET; and   a buried device isolation layer beneath the seamless epitaxial channel region.   
   
   
       2 . A MOSFET according to  claim 1  wherein a buried device isolation layer comprises the buried device isolation layer beneath a central portion of the seamless epitaxial channel and absent from sidewalls of source/drain regions of the MOSFET. 
   
   
       3 . A MOSFET according to  claim 1  wherein a buried device isolation layer comprises the buried device isolation layer beneath a side portion of the seamless epitaxial channel including on sidewalls of source/drain regions of the MOSFET. 
   
   
       4 . A MOSFET according to  claim 1  wherein a buried device isolation layer comprises the buried device isolation layer beneath an entire length of the seamless epitaxial channel and including on sidewalls of source/drain regions of the MOSFET. 
   
   
       5 . A MOSFET according to  claim 1  wherein an upper surface of the buried device isolation layer is buried beneath a surface of the seamless epitaxial channel by an amount sufficient to avoid a floating body effect. 
   
   
       6 . A MOSFET according to  claim 1  further comprising:
 a liner layer surrounding the device isolation layer comprising a silicon nitride layer, a silicon oxynitride layer, and/or a silicon oxide layer.   
   
   
       7 . A MOSFET according to  claim 6  further comprising:
 a thermal oxidation layer surrounding the liner layer.