Micropackaging method and devices

Abstract

A method of micro-packaging a component wherein at least a first and a second semi-conductor substrate are provided, one of which has electrical through connections (vias). A depression in either one of the substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. A micro-packaged electronic or micromechanic device, including a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing is also disclosed. An electronic or micromechanic component is attached to the electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box.

1 - 42 . (canceled) 
   
   
       43 . A method of micro-packaging a component ( 4 ), comprising the steps of:
 providing a plurality of substrates ( 1 ,  10 ,  11 ) comprising at least a first and a second substrate ( 1 ,  10 ), the first substrate ( 1 ) being a semiconductor substrate and being provided with an electrical through connection ( 2 );   forming a compartment ( 3 ) in at least one of the plurality of the substrates ( 1 ,  10 ,  11 ) by etching;   providing the component ( 4 ) above the first semiconductor substrate ( 1 ) so that it covers at least the through connection ( 2 );   connecting the component ( 4 ) to the through connection ( 2 ); and   joining the substrates ( 1 ,  10 ,  11 ) to form a sealed micro-packaged device ( 15 ).   
   
   
       44 . The method of micro-packaging a component ( 4 ) according to  claim 43 , wherein the first substrate ( 1 ) is provided with a plurality of through connections ( 2 ). 
   
   
       45 . The method of micro-packaging a component ( 4 ) according to  claim 43 , wherein the second substrate ( 10 ) is a semiconductor substrate. 
   
   
       46 . The method of micro-packaging a component ( 4 ) according to  claim 43 , wherein one of the plurality of substrates ( 1 ,  10 ,  11 ) is an intermediate semiconductor substrate ( 11 ), interposed between the first and the second substrates ( 1 ,  10 ). 
   
   
       47 . The method of micro-packaging a component ( 4 ) according to  claim 43 , wherein the first substrate ( 1 ) which is provided with electrical through connections ( 2 ) has a thickness of >100 μm, preferably >200 μm, more preferably >300 μm, still more preferred >400 μm, and most preferred >500 μm. 
   
   
       48 . The method of micro-packaging a component ( 4 ) according to  claim 43 , wherein the step of providing the component ( 4 ) further comprises the step of attaching the component ( 4 ) directly to the through connections ( 2 ). 
   
   
       49 . The method of micro-packaging a component ( 4 ) according to  claim 48 , further comprising the steps of:
 etching a depression ( 3   a ) in the first substrate ( 1 ) which is provided with electrical through connections ( 2 ), the depression ( 3   a ) defining the compartment ( 3 ); and   sealing the depression ( 3   a ) with the second substrate ( 10 ).   
   
   
       50 . The method of micro-packaging a component ( 4 ) according to  claim 48 , further comprising the steps of:
 etching a depression ( 3   a ) in the second substrate ( 10 ), the depression ( 3   a ) defining the compartment ( 3 ); and   sealing the depression ( 3   a ) with the first substrate ( 1 ).   
   
   
       51 . The method of micro-packaging a component ( 4 ) according to  claim 48 , further comprising the steps of:
 etching a depression ( 4   a ) in each of the first and the second substrates ( 1 ,  10 ), the depressions ( 3   a ) defining the compartment ( 3 ); and   sealing the depressions ( 4   a ) by joining the substrates ( 1 ,  10 ).   
   
   
       52 . The method of micro-packaging a component ( 4 ) according to  claim 48 , further comprising the steps of:
 etching a hole ( 3   b ) in the intermediate substrate ( 11 ), the hole ( 3   b ) defining the compartment ( 3 ); and   sealing the compartment ( 3 ) by joining the substrates ( 1 ,  10 ,  11 ).   
   
   
       53 . The method of micro-packaging a component ( 4 ) according to  claim 49 , further comprising the steps of:
 etching a hole ( 3   b ) in the intermediate substrate ( 11 ), the depression ( 3   a )/depressions ( 3   a ) and the hole ( 3   b ) defining the compartment ( 3 ); and   sealing the compartment ( 3 ) by joining the substrates ( 1 ,  10 ,  11 ).   
   
   
       54 . The method of micro-packaging a component ( 4 ) according to  claim 48 , wherein the component ( 4 ) is a discrete component which is attached by surface mounting such as any of flip chip mounting, soldering, ultrasonic welding, thermocompression bonding, gluing, etc. 
   
   
       55 . The method of micro-packaging a component ( 4 ) according to  claim 48 , wherein a depression ( 3 ) is made in the first substrate ( 1 ) by etching, and the component ( 4 ) is monolithically integrated in the depression in the first substrate ( 1 ) using surface micromachining or bulk micromachining, and wherein the second substrate ( 10 ) is a planar substrate forming a lid covering the depression ( 3 ). 
   
   
       56 . The method of micro-packaging a component ( 4 ) according to  claim 55 , wherein the step of joining further comprises the step of fusion bonding the substrates. 
   
   
       57 . The method of micro-packaging a component ( 4 ) according to  claim 55 , wherein the step of joining further comprises the step of anodic bonding the substrates. 
   
   
       58 . The method of micro-packaging a component ( 4 ) according to  claim 47 , wherein the through connections ( 2 ) are extending entirely through the first substrate ( 1 ). 
   
   
       59 . The method of micro-packaging a component ( 4 ) according to  claim 47 , wherein the through connections ( 2 ) are provided in a SOI substrate, the through connections ( 2 ) extending entirely through the device layer of the SOI substrate. 
   
   
       60 . A micro-packaged electronic or micromechanic device ( 15 ) comprising a casing ( 13 ) which encloses a compartment ( 3 ); electrical through connections ( 2 ) through the bottom of the casing ( 13 ); and an electronic or micromechanic component ( 4 ) connected to the electrical through connections ( 2 ), the micro-packaged device ( 15 ) being hermetically sealed for maintaining a desired atmosphere, suitable vacuum inside, characterised in that the casing ( 13 ) is made of a semiconducting material comprising a first substrate ( 1 ), optionally an intermediate substrate ( 11 ), and a second substrate ( 10 ) forming a lid, and in that the component ( 4 ) is located immediately above and attached to the through connections ( 2 ). 
   
   
       61 . The micro-packaged electronic or micromechanic device ( 15 ) according to  claim 60 , wherein the component ( 4 ) is directly attached to the through connections ( 2 ). 
   
   
       62 . The micro-packaged electronic or micromechanic device ( 15 ) according to  claim 61 , wherein the component ( 4 ) is a discrete component attached by surface mounting such as any of flip chip mounting, soldering, ultrasonic welding, thermocompression bonding, gluing. 
   
   
       63 . The micro-packaged electronic or micromechanic device ( 15 ) according to  claim 61 , wherein the component ( 4 ) is monolithically integrated with the casing ( 13 ) by surface micromachining or bulk micromachining. 
   
   
       64 . The micro-packaged electronic or micromechanic device ( 15 ) according to  claim 63 , wherein the casing ( 13 ) is bonded by fusion bonding or anodic bonding. 
   
   
       65 . The micro-packaged electronic or micromechanic device ( 15 ) according to  claim 60 , wherein the casing ( 13 ) comprises large contact areas ( 8 ) for surface mounting on an outer bottom surface.