US2010103736A1PendingUtilityA1
Nonvolatile semiconductor memory having a word line bent towards a select gate line side
Est. expiryJun 27, 2026(expired)· nominal 20-yr term from priority
G11C 5/063G11C 16/04G11C 5/06G11C 16/0483G11C 16/08G11C 16/02H10B 41/10H10B 69/00H10B 41/35
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Claims
Abstract
A nonvolatile semiconductor memory includes a cell unit having a select gate transistor and a memory cell connected in series, a select gate line connected to the select gate transistor, and a word line connected to the memory cell. One end of the word line is bent to the select gate line side, and a fringe is connected between a bent point and a distal end of the word line.
Claims
exact text as granted — not AI-modified1 . A nonvolatile semiconductor memory comprising:
a first cell unit having a first select gate transistor and first memory cells connected in series in a first direction; a second cell unit having a second select gate transistor and second memory cells connected in series in the first direction, the second select gate transistor being adjacent in the first direction to the first select gate transistor; a memory cell array having the first and second cell units; a first select gate line extending in a second direction that crosses the first direction and connected to the first select gate transistor; first word lines extending in the second direction, respectively connected to the first memory cells; a second select gate line extending in the second direction and connected to the second select gate transistor; and second word lines extending in the second direction, respectively connected to the second memory cells, wherein, each of ends of the first and second word lines is bent to the first and second select gate line sides, and contact plugs are connected between a bent point and a distal end of the first and second word lines, in a contact area at one end in the second direction of the memory cell array.
2 . The nonvolatile semiconductor memory according to claim 1 further comprising fringes which are connected to the word lines, respectively,
wherein the fringes include a first fringe which is connected to an i-th (i is an odd number) word line from the first or second select gate lines, and a second fringe which is connected to an (i+1)-th word line, wherein the first fringe extends between the first bent point and the distal end of the i-th word line, and the second fringe extends between the second bent point and the distal end of the (i+1)-th word line, and wherein the first and second fringes extend in opposite directions.
3 . The nonvolatile semiconductor memory according to claim 1 , wherein the first and second word lines are formed in a loop shape that multiply surrounds the first and second select gate lines.
4 . The nonvolatile semiconductor memory according to claim 1 , wherein the first and second word lines are separated from each other in the contact areas.
5 . The nonvolatile semiconductor memory according to claim 1 , wherein distal ends of the first and second word lines extend to an area at which distal ends of the first and second select gate lines are disposed.
6 . The nonvolatile semiconductor memory according to claim 1 , wherein the first and second cell units are each NAND cell units.Join the waitlist — get patent alerts
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