US2010213528A1PendingUtilityA1

Metal oxide semiconductor device and method for operating an array structure comprising the same devices

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Assignee: CHEN CHIA-HSINGPriority: May 30, 2007Filed: May 7, 2010Published: Aug 26, 2010
Est. expiryMay 30, 2027(~0.9 yrs left)· nominal 20-yr term from priority
Inventors:Chia-Hsing Chen
H10D 88/101H10D 88/01H10D 84/038H10D 30/637G11C 16/0483H10B 41/30H10B 69/00H10B 41/20
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Claims

Abstract

The present invention discloses a metal oxide semiconductor (MOS) device and a method for operating an array structure comprising the same devices. The MOS device of the present invention comprises a device layer; an ion-implanted layer formed on the device layer and providing the source, the drain and the channel; and a gate structure formed on the ion-implanted layer. Via applying a bias voltage to the gate, the carrier density in the channel region is different from that in the source region or the drain region; thereby, the MOS device of the present invention can undertake programming, erasing and reading activities. The present invention can simplify the MOS device fabrication process, reduce the operating voltage, and promote the integration density of a 2-dimensional or 3-dimensional MOS device array.

Claims

exact text as granted — not AI-modified
1 . A metal oxide semiconductor device structure comprising:
 a device layer having a first surface and a second surface, wherein said device layer is a double-well device layer or an oxide device layer, and said ion-implanted layer is implanted with a first type ion or a second type ion; if said first type is P type, said second type is N type; if said first type is N type, said second type is P type;   a first ion-implanted layer formed on said first surface of said device layer and providing at least one source, at least one drain and at least one channel; and   at least one first gate structure formed on said first ion-implanted layer; and   said first gate structure further comprises a first dielectric layer and a first gate layer.   
     
     
         2 . A metal oxide semiconductor device structure according to  claim 1 , wherein said first gate structure is a floating gate structure or a charge-trapping gate structure. 
     
     
         3 . A metal oxide semiconductor device structure according to  claim 1 , wherein said first gate structure is a polysilicon gate structure or a metal gate structure. 
     
     
         4 . A metal oxide semiconductor device structure according to  claim 1 , wherein said first dielectric layer has a structure of first insulating layer/first storage layer/second insulating layer. 
     
     
         5 . A metal oxide semiconductor device structure according to  claim 4 , wherein said first insulating layer and said second insulating layer are made of oxides. 
     
     
         6 . A metal oxide semiconductor device structure according to  claim 4 , wherein said first storage layer is made of nitrides. 
     
     
         7 . A metal oxide semiconductor device structure according to  claim 1  further comprising:
 a second ion-implanted layer formed on said second surface of said device layer and providing at least one source, at least one drain and at least one channel; and   at least one second gate structure formed on said second ion-implanted layer.   
     
     
         8 . A metal oxide semiconductor device structure according to  claim 7 , wherein said second gate structure further comprises a second dielectric layer and a second gate layer. 
     
     
         9 . A metal oxide semiconductor device structure according to  claim 7 , wherein said second gate structure is a floating gate structure or a charge-trapping gate structure. 
     
     
         10 . A metal oxide semiconductor device structure according to  claim 7 , wherein said second gate structure is a polysilicon gate structure or a metal gate structure. 
     
     
         11 . A metal oxide semiconductor device structure according to  claim 8 , wherein said second dielectric layer has a structure of third insulating layer/second storage layer/fourth insulating layer. 
     
     
         12 . A metal oxide semiconductor device structure according to  claim 11 , wherein said third insulating layer and said fourth insulating layer are made of oxides. 
     
     
         13 . A metal oxide semiconductor device structure according to  claim 11 , wherein said second storage layer is made of nitrides.

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