US2010224965A1PendingUtilityA1
Through-silicon via structure and method for making the same
Est. expiryMar 9, 2029(~2.7 yrs left)· nominal 20-yr term from priority
Inventors:Chien-Li Kuo
H10W 72/952H10W 72/923H10W 72/244H10W 72/221H10W 72/90H10W 20/20H10W 20/0249H10W 20/217H10W 72/252H10W 20/023
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Claims
Abstract
A through-silicon via structure includes a substrate with a first side and a second side, a through-silicon hole connecting the first side and the second side and filled with a conductive material, a passivation layer disposed on and contacting the first side and covering the through-silicon hole, and a protection ring surrounding but not contacting the through-silicon hole and exposed by the first side and the second side. The protection ring is filled with an insulating material.
Claims
exact text as granted — not AI-modified1 . A through-silicon via (TSV) structure, comprising:
a substrate with a first side and a second side opposite to said first side; a through-silicon hole connecting said first side and said second side and filled with a first conductive material; a passivation layer comprising a second conductive material and disposed on and contacting said first side and covering said through-silicon hole; and a protection ring surrounding but not contacting said through-silicon hole, exposed by said first side and said second side and filled with an insulating material.
2 . The through-silicon via structure of claim 1 , wherein said substrate further comprises a shallow trench isolation.
3 . The through-silicon via structure of claim 1 , wherein said passivation layer comprises a gate structure.
4 . The through-silicon via structure of claim 1 , wherein said passivation layer comprises a contact etch stop layer (CESL).
5 . The through-silicon via structure of claim 1 , wherein said passivation layer covers said protection ring.
6 . The through-silicon via structure of claim 1 , wherein the diameter of said through-silicon hole is larger than the ring width of said protection ring.
7 . The through-silicon via structure of claim 1 , wherein said through-silicon hole further comprises at least one of a barrier layer and a liner.
8 . The through-silicon via structure of claim 1 , wherein said substrate is sandwiched between said through-silicon hole and said protection ring.
9 . The through-silicon via structure of claim 1 , wherein said through-silicon hole is intrinsically deeper than said protection ring.
10 . The through-silicon via (TSV) structure of claim 1 , wherein said conductive material bulges from said second side.
11 . A method for forming a through-silicon via (TSV) structure, comprising:
providing a substrate with a first side and a second side opposite to said first side; performing an etching procedure to form a through-silicon hole and a protection trench, so that said protection trench surrounds said through-silicon hole, wherein said through-silicon hole is deeper than said protection ring; filling said protection trench and said through-silicon hole with an insulating material; forming a passivation layer comprising a first conductive material and disposed on said first side and covering said through-silicon hole; thinning said substrate from said second side to expose said insulating material in said through-silicon hole; and replacing said insulating material in said through-silicon hole with a second conductive material to form said through-silicon via structure.
12 . The method of claim 11 , further comprising:
continuing to thin said substrate from said second side to expose said insulating material in said protection trench to form a protection ring.
13 . The method of claim 12 , wherein said passivation layer covers said protection ring.
14 . The method of claim 12 , wherein said through-silicon hole does not contact said protection ring.
15 . The method of claim 12 , wherein said conductive material bulges from said second side.
16 . The method of claim 11 , further comprising:
forming a pad oxide layer on said substrate; forming a nitride layer on said pad oxide layer; and forming a shallow trench isolation in said substrate.
17 . The method of claim 11 , wherein the diameter of said through-silicon hole is larger than the trench width of said protection trench so that said etching procedure results in said through-silicon hole being deeper than said protection ring.
18 . The method of claim 11 , further comprising:
forming at least one of a barrier layer and a liner in said through-silicon hole.
19 . The method of claim 11 , wherein said passivation layer is selected from a group consisting of a gate structure, a metal interconnection and a contact etch stop layer (CESL).
20 . The method of claim 11 , wherein thinning said substrate from said second side is carried out by a chemical mechanical polishing procedure.
21 . The method of claim 11 , between filling said protection trench and said through-silicon hole with said insulating material and thinning said substrate from said second side further comprising:
performing a semiconductor process selected from a group consisting of a gate process, a source/drain process and an interconnect process.Cited by (0)
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