Method of designing semiconductor integrated circuit, designing apparatus, semiconductor integrated circuit system, semiconductor integrated circuit mounting substrate, package and semiconductor integrated circuit

Abstract

To provide a method of designing a semiconductor integrated circuit with a high workability also in an increase in a scale of an LSI and an enhancement in an integration and designing a semiconductor integrated circuit system in which an unnecessary radiation is reduced and which is excellent in a heat characteristic, a reverse design flow to that in the conventional art is implemented, and a mounting substrate such as a printed-circuit board is first designed and a package substrate for mounting an LSI is designed based on a result of the design of the mounting substrate, and a layout design of the LSI to be mounted on the package substrate is then carried out.

1 - 77 . (canceled) 
     
     
         78 . A method of designing a semiconductor integrated circuit comprising steps of:
 inputting design data of a package substrate that connects a semiconductor integrated circuit;   designing, via an apparatus for designing the semiconductor integrated circuit, an input/output pad arrangement of the semiconductor integrated circuit based on the inputted design data of the package substrate; and   outputting design data of the designed input/output pad arrangement of the semiconductor integrated circuit.   
     
     
         79 . The method of designing a semiconductor integrated circuit according to  claim 78 , further comprising, after the step of designing the input/output pad arrangement, steps of:
 modifying the design data of the designed input/output pad arrangement of the semiconductor integrated circuit; and   correcting the input/output pad arrangement by using the modified design data.   
     
     
         80 . The method of designing a semiconductor integrated circuit according to  claim 78 , wherein the step of designing the input/output pad arrangement comprises the step of designing the arrangement of the input/output pad of the semiconductor integrated circuit corresponding to an arrangement of an external connecting terminal of the package substrate. 
     
     
         81 . The method of designing a semiconductor integrated circuit according to  claim 78 , wherein the step of designing the input/output pad arrangement comprises the step of designing the arrangement of the input/output pad of the semiconductor integrated circuit corresponding to an arrangement of a component of the package substrate. 
     
     
         82 . The method of designing a semiconductor integrated circuit according to  claim 81 , wherein the step of designing the input/output pad arrangement comprises the step of carrying out a design in such a manner that a wiring from the package substrate to the input/output pad of the semiconductor integrated circuit does not have an intersecting region. 
     
     
         83 . The method of designing a semiconductor integrated circuit according to  claim 78 , wherein the step of designing the input/output pad arrangement comprises the step of carrying out a design in order to determine a driving capability of an input/output cell to be connected to the input/output pad of the semiconductor integrated circuit corresponding to an arrangement of a component of the package substrate. 
     
     
         84 . An apparatus for designing a semiconductor integrated circuit, wherein the apparatus receives as an input design data of a package substrate that connects a semiconductor integrated circuit, designs input/output pad arrangement of the semiconductor integrated circuit based on the inputted design data of the package substrate, and outputs design data of the designed input/out pad arrangement of the semiconductor integrated circuit. 
     
     
         85 . The apparatus for designing a semiconductor integrated circuit according to  claim 84 , wherein the apparatus modifies the design data of the designed input/output pad arrangement of the semiconductor integrated circuit, and corrects the input/output pad arrangement by using the modified design data as input data. 
     
     
         86 . The apparatus for designing a semiconductor integrated circuit according to  claim 84 , wherein the apparatus designs the arrangement of the input/output pad of the semiconductor integrated circuit corresponding to an arrangement of an external connecting terminal of the package substrate. 
     
     
         87 . The apparatus for designing a semiconductor integrated circuit according to  claim 84 , wherein the apparatus designs the arrangement of the input/output pad of the semiconductor integrated circuit corresponding to an arrangement of a component of the package substrate. 
     
     
         88 . The apparatus for designing a semiconductor integrated circuit according to  claim 84 , wherein the apparatus determines a driving capability of an input/output cell to be connected to the input/output pad of the semiconductor integrated circuit corresponding to an arrangement of a component of the package substrate. 
     
     
         89 . The apparatus for designing a semiconductor integrated circuit according to  claim 84 , wherein the apparatus designs in such a manner that a wiring from the package substrate to the input/output pad of the semiconductor integrated circuit does not have an intersecting region, corresponding to an arrangement of a component of the package substrate. 
     
     
         90 . A semiconductor integrated circuit that is mounted on a semiconductor integrated circuit mounting substrate and connected to a package substrate, the semiconductor integrated circuit comprising:
 an input/output pad;   wherein the input/output pad is arranged corresponding to a position on the package substrate on which a component is arranged.   
     
     
         91 . The semiconductor integrated circuit according to  claim 90 , wherein the input/output pad is arranged corresponding to an arrangement of an external connecting terminal of the package substrate. 
     
     
         92 . The semiconductor integrated circuit according to  claim 90 , wherein the input/output pad is arranged corresponding to a position on the package substrate on which a ball is arranged. 
     
     
         93 . The semiconductor integrated circuit according to  claim 90 , wherein the input/output pad is arranged corresponding to a position on the package substrate on which an output/input cell is arranged. 
     
     
         94 . The semiconductor integrated circuit according to  claim 90 , wherein the input/output pad is arranged corresponding to a position on the package substrate on which a power cell is arranged. 
     
     
         95 . The semiconductor integrated circuit according to  claim 90 , wherein the input/output pad is arranged corresponding to a driving capability of an input/output cell to be connected to the input/output pad of the semiconductor integrated circuit. 
     
     
         96 . The semiconductor integrated circuit according to  claim 90 , wherein a wiring from the package substrate to the input/output pad of the semiconductor integrated circuit does not have an intersecting region.