US2011027985A1PendingUtilityA1

Semiconductor device having aerial wiring and manufacturing method thereof

Assignee: TSUMURA KAZUMICHIPriority: Aug 10, 2005Filed: Aug 5, 2010Published: Feb 3, 2011
Est. expiryAug 10, 2025(expired)· nominal 20-yr term from priority
H10W 20/495H10W 20/425H10W 20/097H10W 20/077H10W 20/074H10W 20/072H10W 20/049H10W 20/048H10W 20/47H10W 20/46H10W 20/033H10W 20/0552H10W 20/076
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Claims

Abstract

A semiconductor device includes a first aerial wiring including a first wiring layer which is formed in an air gap and contains Cu as a main component and a via layer which is electrically connected to the first wiring layer, is formed in an inter-level insulating film containing a preset constituent element and contains Cu as a main component, and a first porous film formed on the first aerial wiring. The semiconductor device further includes a first barrier film which is formed to cover the surface of the first aerial wiring and contains a compound of the preset constituent element and a preset metal element as a main component.

Claims

exact text as granted — not AI-modified
1 - 15 . (canceled) 
     
     
         16 . A method of manufacturing a semiconductor device comprising:
 forming a groove for wiring in an insulating film above a substrate;   embedding an alloy film including a preset metal element and containing Cu as a main component into the groove;   forming a porous film containing at least Si on the alloy film and insulating film; and   forming an air gap by removing a portion of the insulating film by performing heat treatment together with an etching process through the porous film in an atmosphere containing at least O 2  gas and, at the same time, forming a barrier film containing a compound of the preset metal element, Si element and O element from the O 2  gas as a main component in a self-alignment fashion on the surface of the alloy film.   
     
     
         17 . The method of manufacturing a semiconductor device according to  claim 16 , wherein the insulating film contains at least Si. 
     
     
         18 . The method of manufacturing a semiconductor device according to  claim 16 , wherein the preset metal element includes at least one element selected from the group consisting of Mn, Nb, Zr, Cr, V, Y, Tc and Re. 
     
     
         19 . The method of manufacturing a semiconductor device according to  claim 16 , in which the insulating film is an insulating film which contains no Si, and which further comprises forming an insulating film containing Si on an inner wall of the groove before the alloy film is embedded. 
     
     
         20 . The method of manufacturing a semiconductor device according to  claim 19 , wherein the insulating film which contains no Si includes at least one of a polyarylene ether film and a resist film containing no Si and the insulating film which contains Si comprises at least one of an SiO 2  film, SiOF film, SiOC film, SiC film, SiCN film and SiN film. 
     
     
         21 . The method of manufacturing a semiconductor device according to  claim 19 , wherein the insulating film which contains no Si includes at least one of a polyarylene ether film and a resist film containing no Si and the insulating film which contains Si comprises a SiO 2  film. 
     
     
         22 . The method of manufacturing a semiconductor device according to  claim 19 , wherein the insulating film which contains no Si includes at least one of a polyarylene ether film and a resist film containing no Si and the insulating film which contains Si comprises a SiOF film. 
     
     
         23 . The method of manufacturing a semiconductor device according to  claim 19 , wherein the insulating film which contains no Si includes at least one of a polyarylene ether film and a resist film containing no Si and the insulating film which contains Si comprises a SiOC film. 
     
     
         24 . The method of manufacturing a semiconductor device according to  claim 19 , wherein the insulating film which contains no Si includes at least one of a polyarylene ether film and a resist film containing no Si and the insulating film which contains Si comprises a SiC film. 
     
     
         25 . The method of manufacturing a semiconductor device according to  claim 19 , wherein the insulating film which contains no Si includes at least one of a polyarylene ether film and a resist film containing no Si and the insulating film which contains Si comprises a SiCN film. 
     
     
         26 . The method of manufacturing a semiconductor device according to  claim 19 , wherein the insulating film which contains no Si includes at least one of a polyarylene ether film and a resist film containing no Si and the insulating film which contains Si comprises a SiN film. 
     
     
         27 . The method of manufacturing a semiconductor device according to  claim 16 , wherein the alloy of said alloy film is a CuMn alloy. 
     
     
         28 . The method of manufacturing a semiconductor device according to  claim 16 , wherein said heat treatment is performed for 30 to 60 minutes to set the substrate temperature at 200 to 600° C.

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