US2011039415A1PendingUtilityA1

Method of fabricating dual damascene structure

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Assignee: LIU AN-CHIPriority: Jul 20, 2006Filed: Oct 25, 2010Published: Feb 17, 2011
Est. expiryJul 20, 2026(~0 yrs left)· nominal 20-yr term from priority
Inventors:An-Chi Liu
H10W 20/085
45
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Claims

Abstract

A semiconductor wafer includes a substrate, a conductive layer, a dielectric layer having a via, a hard mask defined a trench pattern, and a sacrificial layer. Then a sequential of etching processes is performed upon the semiconductor wafer in a chamber to form a trench and expose the conductive layer. By operating all procedures within one chamber, manufacturing time is efficiently shortened and yield is thus increased.

Claims

exact text as granted — not AI-modified
1 . A method of ashing and etching to fabricate a dual damascene structure on a semiconductor wafer, the semiconductor wafer comprising a substrate, a conductive layer, a cap layer, a dielectric layer comprising a via hole and a trench, a hard mask comprising a trench pattern larger than the via hole in bird's eye view, and a photoresist filled in the via hole, the method being performed in an etching chamber, the method comprising:
 performing an ashing process, the ashing process using an oxygen based plasma gas to remove the photoresist to expose the cap layer through the via hole without removing the hard mask; and   performing an etching process, the etching process using a tetrafluoromethane based plasma to etch the cap layer to expose the conductive layer.   
     
     
         2 . The method of  claim 1 , further comprising a wafer-less dry clean process for cleaning the etching chamber after the semiconductor wafer is removed. 
     
     
         3 . The method of  claim 2 , wherein the wafer-less dry clean process uses a cleaning plasma gas comprising oxygen, argon, tetrafluoromethane, or a mixture of the above. 
     
     
         4 . The method of  claim 2 , wherein the wafer-less dry clean process comprises the steps of:
 using an oxygen based cleaning plasma gas and utilizing an endpoint detection for confirmation; and   using an oxygen based cleaning plasma gas in time mode for further cleaning.   
     
     
         5 . The method of  claim 4 , wherein the wafer-less dry clean process further comprises the steps of:
 using an oxygen based cleaning plasma gas with high flow rate and low pressure relative to the gases in  claim 4 ;   using an argon based cleaning plasma gas; and   using a mixed cleaning plasma comprising tetrafluoromethane, oxygen, and argon.   
     
     
         6 . The method of  claim 1 , wherein the etching chamber comprises an yttria coating on the sidewall. 
     
     
         7 . The method of  claim 1 , wherein the ashing process further comprises a step of using an oxygen based plasma gas. 
     
     
         8 . The method of  claim 1 , wherein the etching process further comprises a step of using a nitrogen based plasma gas. 
     
     
         9 . The method of  claim 8 , wherein the etching process further comprises a sub-step of using a nitrogen based plasma gas for cleaning the etching chamber. 
     
     
         10 . The method of  claim 9 , wherein the etching process further comprises a step of using an argon based plasma gas for cleaning the etching chamber.

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