Layout Content Analysis for Source Mask Optimization Acceleration
Abstract
The invention provides for the acceleration of a source mask optimization process. In some implementations, a layout design is analyzed by a pattern matching process, wherein sections of the layout design having similar patterns are identified and consolidated into pattern groups. Subsequently, sections of the layout design corresponding to the pattern groups may be analyzed to determine their compatibility with the optical lithographic process, and the compatibility of these sections may be classified based upon a “cost function.” With further implementations, the analyzed sections may be classified as printable or difficult to print, depending upon the particular lithographic system. The compatibility of various sections of a layout design may then be utilized to optimize the layout design during a lithographic friendly design process. For example, during the design phase, sections categorized as difficult to print may be flagged for further optimization, processing, or redesign. In further implementations, the difficult-to-print sections may be subjected to a source mask optimization process. Subsequently, the entire layout design may receive a conventional resolution enhancement treatment using the optimized source.
Claims
exact text as granted — not AI-modified1 . A computer implemented method comprising:
identifying a layout design for a mask; partitioning the layout design into a plurality of layout sections; consolidating the plurality of layout sections into a plurality of pattern groups; deriving a pattern group printing difficulty factor for ones of the plurality of pattern groups; and marking ones of the plurality of layout sections for modification based in part upon the pattern group printing difficulty factor.
2 . The computer implemented method recited in claim 1 , further comprising saving the marked layout design to a memory storage location.
3 . The computer implemented method recited in claim 2 , the method act for partitioning the layout design into a plurality of layout sections comprising:
identifying a partition distance; and splitting the layout design into layout sections of a similar geometric area, the geometric area being based in part upon the partition distance.
4 . The computer implemented method recited in claim 3 , the method act for consolidating the plurality of layout sections into a plurality of pattern groups comprising:
identifying a plurality of unique patterns based in part upon the geometric relationship of shapes defined by the plurality of layout sections; forming a pattern group corresponding to each of the plurality of unique patterns; for each of the pattern groups, identifying ones of the plurality of layout sections where the geometric relationship of shapes defined by the identified ones of the plurality of layout sections are similar to the unique pattern associated with the pattern group, and associating the identified ones of the plurality of layout sections with the pattern group.Join the waitlist — get patent alerts
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