Metal Oxide Semiconductor Field Effect Transistors (MOSFETS) Including Recessed Channel Regions

Abstract

Unit cells of metal oxide semiconductor (MOS) transistors are provided having an integrated circuit substrate and a MOS transistor on the integrated circuit substrate. The MOS transistor includes a source region, a drain region and a gate. The gate is between the source region and the drain region. A channel region is provided between the source and drain regions. The channel region has a recessed region that is lower than bottom surfaces of the source and drain regions. Related methods of fabricating transistors are also provided.

1 . A semiconductor device, comprising:
 a source/drain epitaxial layer on a semiconductor substrate;   a channel epitaxial layer on the semiconductor substrate, the channel epitaxial layer having a recess region that is lower than a bottom surface of the source/drain epitaxial layer;   a gate on the channel epitaxial layer; and   an insulating layer between the source/drain epitaxial layer and the semiconductor substrate and self-aligned to the gate.   
     
     
         2 . The device of  claim 1 , wherein a bottom surface of the gate adjacent to the semiconductor substrate is lower than a top surface of the source/drain region. 
     
     
         3 . The device of  claim 1 , further comprising a spacer in a sidewall of the gate. 
     
     
         4 . The device of  claim 1 , further comprising an isolation layer, a bottom surface of the isolation layer being lower than a bottom surface of the source/drain epitaxial layer.