Low etch pit density (epd) semi-insulating iii-v wafers

Abstract

Systems and methods of manufacturing wafers are disclosed using a low EPD crystal growth process and a wafer annealing process are provided resulting in III-V/GaAs wafers that provide higher device yields from the wafer. In one exemplary implementation, there is provided a method of manufacturing a group III based material with a low etch pit density (EPD). Moreover, the method includes forming polycrystalline group III based compounds, and performing vertical gradient freeze crystal growth using the polycrystalline group III based compounds. Other exemplary implementations may include controlling temperature gradient(s) during formation of the group III based crystal to provide very low etch pit density.

1 . A method for manufacture a gallium based material with a low etch pit density (EPD), the method comprising:
 forming polycrystalline gallium based compounds; and   performing vertical gradient freeze crystal growth using the polycrystalline gallium based compounds, wherein the step of performing comprises:
 controlling temperature gradient(s) during formation of the gallium based crystal such that the gallium based crystal has an etch pit density of less than about 900 per square centimeter. 
   
     
     
         2 . The method of  claim 1  wherein the step of performing further comprises controlling one or both of a shape and/or a temperature gradient of a melt/crystal interface. 
     
     
         3 . The method of  claim 1  wherein the step of performing further comprises controlling melt/crystal interface. 
     
     
         4 . The method of  claim 3  wherein controlling the melt/crystal interface includes controlling temperature gradient of the melt/crystal interface. 
     
     
         5 . The method of  claim 3  wherein controlling the melt/crystal interface includes controlling shape of the melt/crystal interface. 
     
     
         6 . The method of  claim 5  wherein controlling the melt/crystal interface includes controlling temperature gradient of the melt/crystal interface. 
     
     
         7 . The method of  claim 1 , wherein the crystal has an etch pit density of about 600 per square centimeter. 
     
     
         8 . The method of  claim 7  further comprising forming a gallium arsenide substrate from the gallium based crystal. 
     
     
         9 . The method of  claim 7  further comprising forming a gallium phosphide or other gallium-group V substrate from the gallium based crystal. 
     
     
         10 . The method of  claim 1 , wherein performing vertical gradient freeze crystal growth further comprises controlling a shape of the melt/crystal interface during the vertical gradient freeze crystal growth wherein the shape is concave or convex to a melt front at no more than about ±2 mm. 
     
     
         11 . The method of  claim 1 , wherein performing vertical gradient freeze crystal growth further comprises controlling a crystallization velocity during the vertical gradient freeze crystal growth wherein the crystallization velocity is between about 2 and about 16 mm/hour. 
     
     
         12 . The method of  claim 1 , wherein performing vertical gradient freeze crystal growth further comprises controlling temperature gradient(s) associated with a melt/crystal interface during the vertical gradient freeze crystal growth wherein the temperature gradient at the melt/crystal interface is between about 0.1 to about 2 degrees Celsius/cm. 
     
     
         13 . A method for manufacture of a substrate with low light point defects, the method comprising:
 forming a gallium arsenide based substrate;   annealing the gallium arsenide based substrate using a single step annealing; and   removing a portion of the surface of the gallium based substrate to form a gallium arsenide based substrate having a light point defect density of less than about 1 per square centimeter per gallium arsenide based substrate with a particle size of equal to or greater than about 0.3 micrometers.   
     
     
         14 . The method of  claim 13 , wherein annealing the gallium arsenide based substrate further comprises controlling a heating rate during the annealing wherein the heating rate is about 900 to about 1050 degrees Celsius over about 10 to about 48 hours. 
     
     
         15 . The method of  claim 13 , wherein annealing the gallium arsenide based substrate further comprises controlling a platform temperature during the annealing wherein the platform temperature is about 900 to about 1050 degrees Celsius. 
     
     
         16 . The method of  claim 13 , wherein annealing the gallium arsenide based substrate further comprises controlling a cooling rate during the annealing wherein the cooling rate is to room temperature in about 6 to about 24 hours. 
     
     
         17 . The method of  claim 13  further comprising controlling oxygen into a surface of the gallium based substrate during the annealing process such that a predetermined oxygen content level is achieved. 
     
     
         18 . A gallium based substrate, comprising:
 a substrate having an etch pit density of less than 900 per square centimeter using a vertical gradient freeze process; and   the substrate having less than a total of about 120 light point defects per wafer having a light point defect particle size of greater than about 0.3 micrometers.   
     
     
         19 . The substrate of  claim 18 , wherein the substrate is gallium arsenide (GaAs). 
     
     
         20 . The substrate of  claim 18 , wherein the substrate is indium phosphide, gallium phosphide or other III-V compounds. 
     
     
         21 . A method for manufacture a group III based material with a low etch pit density (EPD), the method comprising:
 forming polycrystalline group III based compounds; and   performing vertical gradient freeze crystal growth using the polycrystalline group III based compounds, wherein the step of performing comprises:
 controlling temperature gradient of the group III based crystal during formation of the group III based crystal such that the group III based crystal has an etch pit density of less than about 900 per square centimeter. 
   
     
     
         22 . The method of  claim 21  further comprising forming indium phosphide or other III-V substrates from the group III based crystal. 
     
     
         23 . The method of  claim 21 , wherein performing vertical gradient freeze crystal growth further comprises controlling temperature gradient(s) associated with the group III based crystal during the vertical gradient freeze crystal growth wherein a crystal/melt temperature gradient is maintained between about 0.1 to about 2 degrees Celsius/cm. 
     
     
         24 . A method for manufacture a gallium based material with a low etch pit density (EPD), the method comprising:
 forming polycrystalline gallium based compounds; and   performing vertical gradient freeze crystal growth using the polycrystalline gallium based compounds, wherein the step of performing comprises:
 controlling melt/crystal interface during formation of the gallium based crystal such that the gallium based crystal has an etch pit density of less than about 900 per square centimeter. 
   
     
     
         25 . The method of  claim 24  wherein controlling the melt/crystal interface includes controlling one or both of shape and/or temperature gradient of the melt/crystal interface.