Circuit substrate and manufacturing method thereof

Abstract

A manufacturing method of a circuit substrate includes the following steps. The peripheries of two metal layers are bonded to form a sealed area. At least a through hole passing through the sealed area is formed. Two insulating layers are formed on the two metal layers. Two conductive layers are formed on the two insulating layers. The two insulating layers and the two conductive layers are laminated to the two metal layers bonded to each other, wherein the metal layers are embedded between the two insulating layers, and the two insulating layers fill into the through hole. The sealed area of the two metal layers is separated to form two separated circuit substrates. Therefore, the thinner substrate can be operated in the following steps, such as patterning process or plating process. In addition, the method may be extended to manufacture the circuit substrate with odd-numbered layer or even-numbered layer.

1 . A manufacturing method of a circuit substrate, comprising:
 bonding peripheries of two metal layers to form a sealed area;   forming at least a through hole passing through the sealed area;   forming two insulating layers on the two metal layers, and forming two conductive layers on the two insulating layers;   laminating the two insulating layers and the two conductive layers to the two metal layers, wherein the two metal layers bonded to each other are embedded between the two insulating layers, and the two insulating layers are filled into the through hole; and   separating the sealed area of the two metal layers to form two separated circuit substrates.   
     
     
         2 . The manufacturing method of the circuit substrate as claimed in  claim 1 , wherein a method of bonding the peripheries of the two metal layers comprises welding, spot welding or using an adhesive, and a material of the adhesive comprises cyanoacrylate ester or polypropylene resin. 
     
     
         3 . The manufacturing method of the circuit substrate as claimed in  claim 1 , further comprising:
 removing a part of the two insulating layers and a part of the two conductive layers after laminating the two insulating layers and the two conductive layers to the two metal layers, so as to form a plurality of blind holes exposing the two metal layers;   forming a conductive material in the blind holes and on the remained two conductive layers; and   patterning the conductive material, the metal layer and the conductive layer after separating the sealed area of the two metal layers.   
     
     
         4 . The manufacturing method of the circuit substrate as claimed in  claim 1 , further comprising:
 removing a part of the two insulating layers and a part of the two conductive layers after laminating the two insulating layers and the two conductive layers to the two metal layers, so as to form a plurality of blind holes exposing the two metal layers;   thinning the two conductive layers;   forming two electroplating seed layers on the two thinned conductive layers and in the blind holes;   exposing the metal layers after separating the sealed area of the two metal layers;   respectively forming a patterned photoresist layer on the electroplating seed layer and the exposed metal layer;   taking the patterned photoresist layers as a mask to electroplate the electroplating seed layers; and   removing the patterned photoresist layers and a part of the electroplating seed layers covered by the patterned photoresist layers.   
     
     
         5 . The manufacturing method of the circuit substrate as claimed in  claim 1 , further comprising:
 patterning the two conductive layers after laminating the two insulating layers and the two conductive layers to the two metal layers, so as to form two patterned conductive layers;   forming two other insulating layers on the two patterned conductive layers, and forming two other conductive layers on the two other insulating layers;   laminating the insulating layers and the two other conductive layers, wherein the two patterned conductive layers are embedded in the insulating layers;   removing a part of the insulating layers, a part of the metal layer and a part of the other conductive layer after separating the sealed area of the two metal layers, so as to form a plurality of blind holes exposing the patterned conductive layer;   forming a conductive material in the blind holes and on the remained metal layer and the other conductive layer; and   patterning the conductive material, the metal layer and the other conductive layer.   
     
     
         6 . The manufacturing method of the circuit substrate as claimed in  claim 1 , further comprising:
 patterning the two conductive layers after laminating the two insulating layers and the two conductive layers to the two metal layers, so as to form two patterned conductive layers;   forming two other insulating layers on the two patterned conductive layers, and forming two other conductive layers on the two other insulating layers;   laminating the insulating layers and the two other conductive layers, wherein the two patterned conductive layers are embedded in the insulating layers;   removing a part of the insulating layers, a part of the metal layer and a part of the other conductive layer after separating the sealed area of the two metal layers, so as to form a plurality of blind holes exposing the patterned conductive layer;   removing the other conductive layer and the metal layer to expose the insulating layers;   forming two electroplating seed layers on the insulating layers and in the blind holes;   forming two patterned photoresist layers on the two electroplating seed layers;   taking the patterned photoresist layers as a mask to electroplate the electroplating seed layers; and   removing the patterned photoresist layers and a part of the electroplating seed layers covered by the patterned photoresist layers.   
     
     
         7 . The manufacturing method of the circuit substrate as claimed in  claim 1 , further comprising:
 removing a part of the two insulating layers and a part of the two conductive layers after laminating the two insulating layers and the two conductive layers to the two metal layers, so as to form a plurality of first blind holes exposing the two metal layers;   removing the two conductive layers to expose the two insulating layers;   forming two electroplating seed layers on the two insulating layers and in the first blind holes;   forming two patterned photoresist layers on the electroplating seed layers;   taking the patterned photoresist layers as a mask to electroplate the electroplating seed layers;   removing the patterned photoresist layers and a part of the electroplating seed layers covered by the patterned photoresist layers, so as to form two patterned conductive layers and a plurality of conductive through hole structures on the two insulating layers;   forming two other insulating layers on the two patterned conductive layers, and forming two other conductive layers on the two other insulating layers;   laminating the insulating layers and the two other conductive layers, wherein the two patterned conductive layers are embedded in the insulating layers;   removing a part of the insulating layers, the metal layer and the other conductive layer after separating the sealed area of the two metal layers, so as to form a plurality of second blind holes exposing the patterned conductive layer;   forming two other electroplating seed layers on the two other insulating layers, one ends of the first blind holes and in the second blind holes;   forming two other patterned photoresist layers on the two other electroplating seed layers;   taking the two other patterned photoresist layers as a mask to electroplate the two other electroplating seed layers; and   removing the two other patterned photoresist layers and a part of the two other electroplating seed layers covered by the two other patterned photoresist layers.   
     
     
         8 . The manufacturing method of the circuit substrate as claimed in  claim 1 , wherein the two metal layers respectively comprises a first copper foil layer and a second copper foil layer, and a thickness of each of the second copper foil layers is substantially greater than a thickness of each of the first copper foil layers, and the second copper foil layers are bonded to each other. 
     
     
         9 . The manufacturing method of the circuit substrate as claimed in  claim 8 , further comprising:
 patterning the two conductive layers after laminating the two insulating layers and the two conductive layers to the two metal layers, so as to from a first patterned conductive layer and a second patterned conductive layer;   forming a plurality of first through holes extending from the first patterned conductive layer to the second patterned conductive layer;   removing the second copper foil layer after separating the sealed area of the two metal layers;   forming a first insulating layer on the first patterned conductive layer, and forming a first conductive layer on the first insulating layer;   laminating the first insulating layer and the first conductive layer, wherein the first patterned conductive layer is embedded in the insulating layer and the first insulating layer;   removing a part of the insulating layer, the first insulating layer, a part of the first copper foil layer and a part of the first conductive layer to form a plurality of first blind holes exposing the first patterned conductive layer;   respectively forming an electroplating seed layer on the remained first copper foil layer and in the first blind holes and on the remained first conductive layer and in the first blind holes;   forming two patterned photoresist layers on the electroplating seed layers;   taking the patterned photoresist layers as a mask to electroplate the electroplating seed layers to form a plurality of conductive blind hole structures in the first blind holes; and   removing the patterned photoresist layers and a part of the electroplating seed layers covered by the patterned photoresist layers.   
     
     
         10 . The manufacturing method of the circuit substrate as claimed in  claim 9 , wherein the step of forming the first insulating layer on the first patterned conductive layer and forming the first conductive layer on the first insulating layer is performed after the sealed area of the two metal layers is separated. 
     
     
         11 . The manufacturing method of the circuit substrate as claimed in  claim 9 , wherein the step of forming the first insulating layer on the first patterned conductive layer and forming the first conductive layer on the first insulating layer is performed before the sealed area of the two metal layers is separated. 
     
     
         12 . The manufacturing method of the circuit substrate as claimed in  claim 11 , further comprising:
 forming a second insulating layer on the second patterned conductive layer and forming a second conductive layer on the second insulating layer when forming the first insulating layer on the first patterned conductive layer and forming the first conductive layer on the first insulating layer.   
     
     
         13 . The manufacturing method of the circuit substrate as claimed in  claim 9 , further comprising:
 forming a first passivation layer on the first insulating layer and forming a second passivation layer on the insulating layer after removing the patterned photoresist layers and a part of the electroplating seed layers covered by the patterned photoresist layers, wherein the first passivation layer and the second passivation layer cover the conductive blind hole structures;   performing a grinding process to remove a part of the first passivation layer and a part of the second passivation layer to expose the conductive blind hole structures; and   removing the remained first passivation layer and the remained second passivation layer.   
     
     
         14 . The manufacturing method of the circuit substrate as claimed in  claim 9 , further comprising:
 forming a first solder mask layer on the first insulating layer and forming a second solder mask layer on the insulating layer after removing the patterned photoresist layers and a part of the electroplating seed layers covered by the patterned photoresist layers, wherein the first solder mask layer has a plurality of first openings, and the second solder mask layer has a plurality of second openings, and the first openings and the second openings expose a part of the conductive blind hole structure.   
     
     
         15 . A circuit substrate, manufactured according to the manufacturing method of the circuit substrate as claimed in  claim 3 , comprising:
 a patterned metal layer;   a patterned conductive layer;   an insulating layer, located between the patterned metal layer and the patterned conductive layer; and   a conductive material, filled in a plurality of blind holes, wherein the blind holes pass through the insulating layer, and the conductive material is electrically connected to the patterned metal layer and the patterned conductive layer.   
     
     
         16 . A circuit substrate, manufactured according to the manufacturing method of the circuit substrate as claimed in  claim 5 , comprising:
 a patterned metal layer;   a first patterned conductive layer;   a second patterned conductive layer, located between the patterned metal layer and the first patterned conductive layer;   two insulating layers, respectively located between the patterned metal layer and the second patterned conductive layer and between the first patterned conductive layer and the second patterned conductive layer; and   a conductive material, filled in a plurality of blind holes, wherein the blind holes pass through the insulating layers, and the conductive material is electrically connected between the patterned metal layer and the second patterned conductive layer and between the first patterned conductive layer and the second patterned conductive layer.