US2011171780A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

Assignee: RENESAS ELECTRONICS CORPPriority: Jun 7, 2001Filed: Mar 22, 2011Published: Jul 14, 2011
Est. expiryJun 7, 2021(expired)· nominal 20-yr term from priority
H10W 90/754H10W 90/734H10W 90/732H10W 90/724H10W 90/271H10W 74/15H10W 72/07251H10W 72/5522H10W 72/5449H10W 72/5363H10W 72/01225H10W 72/884H10W 72/536H10W 72/252H10W 72/0198H10W 70/655H10W 90/00H10W 74/117H10W 74/00H10W 72/00H10W 70/611H10W 70/65H10W 72/877H10W 72/20H10W 70/60
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Claims

Abstract

Of three chips ( 2 A), ( 2 B), and ( 2 C) mounted on a main surface of a package substrate ( 1 ) in a multi-chip module (MCM), a chip ( 2 A) with a DRAM formed thereon and a chip ( 2 B) with a flash memory formed thereon are electrically connected to wiring lines ( 5 ) of the package substrate ( 1 ) through Au bumps ( 4 ), and a gap formed between main surfaces (lower surfaces) of the chips ( 2 A), ( 2 B) and a main surface of the package substrate ( 1 ) is filled with an under-fill resin ( 6 ). A chip ( 2 C) with a high-speed microprocessor formed thereon is mounted over the two chips ( 2 A) and ( 2 B) and is electrically connected to bonding pads ( 9 ) of the package substrate ( 1 ) through Au wires ( 8 ).

Claims

exact text as granted — not AI-modified
1 - 37 . (canceled) 
     
     
         38 . A method of manufacturing a semiconductor device, comprising the steps of:
 (a) providing a wiring substrate including a plurality of package substrate-forming areas, a plurality of connecting pads formed in each of the package substrate-forming areas, a plating film formed on each of the connecting pads, and a plurality of wiring lines respectively formed in the plurality of package substrate-forming areas, each of the plurality of wiring lines having a portion serving as one of the connecting pads;   (b) mounting a plurality of semiconductor chips on the package substrate-forming areas, respectively;   (c) electrically connecting a plurality of bonding pads of each semiconductor chip with a plurality of the connecting pads of the corresponding package substrate-forming area via a plurality of conductive members, respectively;   (d) after the step (c), forming a resin sealing body on the wiring substrate so as to seal the semiconductor chips with the resin body; and   (e) after the step (d), cutting the resin sealing body and the wiring substrate, and forming a plurality of semiconductor packages;   wherein a part of each of the wiring lines is removed before the step (d).   
     
     
         39 . The method according to  claim 38 , wherein the plurality of connecting pads are formed in a same layer in each package substrate-forming area. 
     
     
         40 . The method according to  claim 39 , wherein the plurality of connecting pads in each package substrate-forming area are comprised of copper. 
     
     
         41 . The method according to  claim 40 , wherein the plating film is comprised of nickel and gold. 
     
     
         42 . A method of manufacturing a semiconductor device, comprising the steps of:
 (a) providing a wiring substrate including a plurality of package substrate-forming areas, a plurality of connecting pads formed in each of the package substrate-forming areas, a plating film formed on each of the connecting pads, and a plurality of wiring lines respectively formed in the plurality of package substrate-forming areas, each of the plurality of wiring lines having a portion serving as one of the connecting pads;   (b) mounting a plurality of semiconductor chips on the package substrate-forming areas, respectively;   (c) electrically connecting a plurality of bonding pads of each semiconductor chip with a plurality of the connecting pads of the corresponding package substrate-forming area via a plurality of conductive members, respectively;   (d) after the step (c), forming a resin sealing body on the wiring substrate so as to seal the semiconductor chips with the resin body; and   (e) after the step (d), cutting the resin sealing body and the wiring substrate, and forming a plurality of semiconductor packages;   wherein before the plating film is formed, the wiring lines of different package substrate-forming areas are electrically connected to each other; and   wherein after the plating film is formed, the wiring lines of the different package substrate-forming areas are electrically separated from each other.

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