Photolithographic mask correction
Abstract
An exemplary method for modifying at least part of an integrated circuit layout comprises obtaining an integrated circuit device layout, the integrated circuit device being designed using a library of cells, obtaining a modified library of cells, and replacing at least one cell in the integrated circuit device layout with a corresponding modified cell of the modified library to obtain a modified integrated circuit device layout. The modified library includes modified cells corresponding to cells in the library and candidate areas of each modified cell indicating portions of the cell for further processing. At least some of the modified cells have been modified to at least partially compensate for a manufacturing effect.
Claims
exact text as granted — not AI-modified1 . A computer-implemented method for processing at least some cells of a library of cells usable for designing integrated circuits, comprising:
(a) obtaining at least one parameter related to a cell; (b) determining an uncertain region based on said parameter; (c) determining a plurality of computer-generated features at least partially within said uncertain region to determine one or more candidate areas indicating portions of said cell for further processing; and (d) outputting said cell and said candidate areas in a database.
2 . The method of claim 1 , further comprising, prior to said step (c), processing said cell to compensate for a manufacturing effect.
3 . The method of claim 2 , wherein said compensate includes correcting a distortion.
4 . The method of claim 2 , wherein said compensate includes an application of a resolution enhancement technique to said cell.
5 . The method of claim 2 , wherein said processing includes an OPC process.
6 . The method of claim 2 , further comprising, prior to step (c), the step of applying a nominal set of computer-generated features near said cell to determine any proximity effects on said cell caused by said nominal set of computer-generated features.
7 . The method of claim 1 , wherein said computer-generated features are randomly generated.
8 . The method of claim 1 , wherein said determine one or more candidate areas includes:
determining a plurality of distributions of performance metric values at control points of said cell; comparing said distributions to tolerances of said cell; determining invalid control points based on said comparing; and mapping said invalid control points to candidate areas on said cell.
9 . The method of claim 8 , wherein said mapping includes:
determining portions of said cell including invalid control points; and mapping one or more polygonal areas encompassing said portions as candidate areas.
10 . The method of claim 8 , wherein said mapping includes:
determining portions of said cell including invalid control points; and outputting said portions as candidate areas of said cell.
11 . The method of claim 8 , wherein said mapping includes determining polygonal areas around said invalid control points based on an interactive range for said cell.
12 . The method of claim 1 , wherein said determine one or more candidate areas includes:
determining a performance metric value at each control point; comparing said performance metric values to tolerances of said cell; determining invalid control points based on said comparing; and mapping said invalid control points to candidate areas on said cell.
13 . The method of claim 12 , further comprising removing said invalid control points from a total number of control points for a next application of computer-generated features.
14 . The method of claim 12 , wherein said mapping includes:
determining portions of said cell including invalid control points; and mapping one or more polygonal areas encompassing said portions as candidate areas.
15 . The method of claim 12 , wherein said mapping includes:
determining portions of said cell including invalid control points; and outputting said portions as candidate areas of said cell.
16 . The method of claim 12 , wherein said mapping includes determining polygonal areas around said invalid control points based on an interactive range for said cell.
17 - 28 . (canceled)
29 . A computer-readable medium for processing at least some cells of a library of cells usable for designing integrated circuits, comprising logic instructions that, when executed:
(a) obtain at least one parameter related to a cell; (b) determine an uncertain region based on said parameter; (c) determine a plurality of computer-generated features at least partially within said uncertain region to determine one or more candidate areas indicating portions of said cell for further processing; and (d) output said cell and indications of said candidate areas.
30 . The computer-readable medium of claim 29 , further comprising logic instructions that, if executed prior to said (b), process said cell to compensate for a manufacturing effect.
31 . The computer-readable medium of claim 30 , wherein said compensate includes correcting a distortion.
32 . The computer-readable medium of claim 30 , wherein said logic instructions to process include logic instructions that, when executed, perform an OPC process.
33 . The computer-readable medium of claim 30 , further comprising, prior to (b), logic instructions that, when executed, apply a nominal set of computer-generated features near said cell to determine any proximity effects on said cell caused by said nominal set of computer-generated features.
34 . The computer-readable medium of claim 29 , wherein said determine one or more candidate areas includes logic instructions that, when executed:
determine a plurality of distributions of performance metric values at control points of said cell; compare said distributions to tolerances of said cell; determine invalid control points based on said comparing; and map said invalid control points to candidate areas on said cell.
35 . The computer-readable medium of claim 29 , wherein said determine one or more candidate areas includes logic instructions that, when executed:
determine a performance metric value at each control point; compare said performance metric values to tolerances of said cell; determine invalid control points based on said comparing; and map said invalid control points to candidate areas on said cell.
36 - 41 . (canceled)
42 . An apparatus for processing at least some cells of a library of cells usable for designing integrated circuits, comprising:
(a) means for obtaining at least one parameter related to a cell; (b) means for determining an uncertain region based on said parameter; (c) means for determining a plurality of computer-generated features at least partially within said uncertain region to determine one or more candidate areas indicating portions of said cell for further processing; and (d) means for outputting said cell and said candidate areas.
43 . (canceled)
44 . An integrated circuit including cells whose corresponding masks having been modified by a process comprising:
(a) obtaining at least one parameter related to a cell; (b) determining an uncertain region based on said parameter; (c) determining a plurality of computer-generated features at least partially within said uncertain region to determine one or more candidate areas indicating portions of said cell for further processing; and (d) outputting said cell and said candidate areas to determine a further modification to portions of a mask usable for patterning said cell.
45 . (canceled)Join the waitlist — get patent alerts
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