US2011256671A1PendingUtilityA1

Semiconductor memory module with reverse mounted chip resistor

Assignee: CHOI HYUN-SEOKPriority: Nov 6, 2006Filed: Jun 27, 2011Published: Oct 20, 2011
Est. expiryNov 6, 2026(~0.3 yrs left)· nominal 20-yr term from priority
H10D 89/00H05K 2201/10477Y10T29/49133H05K 2201/09736H05K 3/3442Y02P70/50H05K 1/111H05K 3/06H05K 2201/10636H05K 3/244H05K 2203/0369H05K 1/181
42
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor memory module having a reverse mounted chip resistor, and a method of fabricating the same are provided. By reverse mounting the chip resistor on the semiconductor memory module, the resistive material is protected, thereby preventing open circuits caused by damage to the resistive material. Also, a chip-resistor connection pad of a module substrate is formed to extend higher from the module substrate than other connection pads connected to other elements. Thus, the resistive material of the chip resistor does not contact the module substrate, thereby preventing poor alignment and defective connections.

Claims

exact text as granted — not AI-modified
1 - 7 . (canceled) 
     
     
         8 . A method of fabricating a semiconductor memory module, comprising:
 patterning a copper layer on a surface of a module substrate to form connection pads;   coating a photoresist on the module substrate including the connection pads;   patterning the photoresist to expose a part of the connection pads on which a chip resistor having a resistive material will be mounted;   forming a copper layer on the part of the connection pads exposed by the photoresist pattern, to form chip-resistor connection pads;   removing the photoresist from the module substrate; and   mounting the chip resistor onto the chip-resistor connection pads.   
     
     
         9 . The method of  claim 8 , wherein the module substrate is formed by stacking a plurality of copper clad laminates formed of thin copper layers on both sides of an epoxy plate. 
     
     
         10 . The method of  claim 8 , wherein the forming of the copper layer is performed such that the resistive material of the chip resistor does not contact the module substrate. 
     
     
         11 . The method of  claim 8 , further comprising forming an insulating dam to prevent a short between the chip-resistor connection pads after removing the photoresist and before mounting the chip resistor. 
     
     
         12 . The method of  claim 8 , wherein forming the copper layer on the connection pad includes forming the copper layer of the connection pad by electroplating. 
     
     
         13 . The method of  claim 8 , wherein the mounting of the chip resistor on the chip-resistor connection pad comprises:
 printing solder paste on the chip-resistor connection pad;   aligning and placing the chip resistor onto the solder paste; and   thermally treating the module substrate, chip resistor, and solder paste to solder the chip-resistor onto the connection pad.   
     
     
         14 . A method of fabricating a semiconductor memory module, comprising:
 patterning a copper layer on a surface of a module substrate to form connection pads including chip-resistor connection pads;   coating a photoresist on the module substrate including the connection pads;   patterning the photoresist to expose a part of the connection pads excluding the chip-resistor connection pads on which a chip resistor will be mounted;   decreasing the height of the exposed connection pads;   thereafter, removing the photoresist from the module substrate; and   mounting a chip resistor onto the chip-resistor connection pads.   
     
     
         15 . The method of  claim 14 , wherein the module substrate is formed by stacking a plural of copper clad laminates formed of thin copper layers on both sides of an epoxy plate. 
     
     
         16 . The method of  claim 14 , wherein the copper layer formed on the module substrate is high enough to prevent the resistor material portion of the chip resistor from contacting the module substrate. 
     
     
         17 . The method of  claim 14 , further comprising forming an insulating dam on the module substrate to prevent a short between the chip-resistor connection pads after removing the photoresist and before mounting the chip resistor. 
     
     
         18 . The method of  claim 14 , wherein the mounting of the chip resistor on the chip-resistor connection pad comprises:
 printing solder paste on the chip-resistor connection pads;   aligning and placing the chip resistor onto the solder paste; and   thermally treating the module substrate, the chip resistor, and the solder paste to solder the chip resistor onto the chip-resistor connection pads.   
     
     
         19 - 31 . (canceled)

Join the waitlist — get patent alerts

Track US2011256671A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.