Gate after Diamond Transistor

Abstract

A gate after diamond transistor and method of making comprising the steps of depositing a first dielectric layer on a semiconductor substrate, depositing a diamond particle nucleation layer on the first dielectric layer, growing a diamond thin film layer on the first dielectric layer, defining an opening for the gate in the diamond thin film layer, patterning of the diamond thin film layer for a gate metal to first dielectric layer surface, etching the first dielectric layer, depositing and defining a gate metal, and forming a contact window opening in the diamond thin film layer and the first dielectric layer to the ohmic contact.

1 . A transistor comprising:
 a first dielectric layer on a semiconductor substrate with an ohmic contact and a source/drain metal;   a diamond thin film layer on the first dielectric layer wherein the diamond thin film layer was deposited before the gate;   a gate opening in the diamond thin film layer;   a gate metal through the diamond thin film layer wherein the gate metal was deposited after the diamond thin film layer; and   a contact window opening in the diamond thin film layer and the first dielectric layer to the ohmic contact.   
     
     
         2 . The transistor of  claim 1  wherein the first dielectric layer has a thickness of from about 0.2 nm to about 100 nm. 
     
     
         3 . The transistor of  claim 1  wherein said first dielectric layer is selected from the group consisting of silicon nitride, silicon oxide, and metal oxide 
     
     
         4 . The transistor of  claim 1  wherein the semiconductor substrate consists of a AlGaN and a GaN epitaxial layer on a SiC substrate. 
     
     
         5 . The transistor of  claim 1  wherein a device isolation process by etching or implanting is performed after depositing and defining the gate metal. 
     
     
         6 . The transistor of  claim 1  wherein the semiconductor substrate comprises
 a AlGaN and a GaN epitaxial layer on a SiC substrate; 
 a source/drain ohmic contact on the AlGaN layer; and 
 a device isolation process; and 
 a thick metal on the gate metal on the source/drain ohmic contact. 
 
     
     
         7 . The transistor of  claim 1  wherein said first dielectric layer is one selected from the group consisting of Al 2 O 3 , Gd2O3, Sc2O3, silicon nitride, silicon oxide, metal oxide layer and combinations thereof. 
     
     
         8 . The transistor of  claim 1  wherein the diamond particle nucleation layer on the first dielectric layer is a nanocrystalline diamond nucleation layer. 
     
     
         9 . The transistor of  claim 1  wherein the metal gate overlaps the diamond thin film layer. 
     
     
         10 . The transistor of  claim 1  further including a second thin dielectric layer after the first dielectric layer is etched to the semiconductor substrate. 
     
     
         11 . The transistor of  claim 1  further including an ohmic metal contact that is etched through a contact window through the diamond thin film layer to a AlGaN/GaN surface. 
     
     
         12 . The transistor of  claim 1  wherein the gate metal is a Schottky gate metal. 
     
     
         13 . The transistor of  claim 1  further including a recess in the semiconductor substrate.