US2011299346A1PendingUtilityA1

Apparatus for source-synchronous information transfer and associated methods

Assignee: FUNG RYANPriority: Jun 3, 2010Filed: Jun 3, 2010Published: Dec 8, 2011
Est. expiryJun 3, 2030(~3.8 yrs left)· nominal 20-yr term from priority
G11C 7/1036G11C 7/1078G11C 7/1093G11C 7/222
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Claims

Abstract

An apparatus includes an interface circuit coupled to an electronic device. The interface circuit provides source synchronous communication with the electronic device using a strobe signal. The interface circuit is configured to gate the strobe signal in order to successfully communicate with the electronic device.

Claims

exact text as granted — not AI-modified
1 . An apparatus, comprising an interface circuit coupled to an electronic device for source synchronous communication with the electronic device using a strobe signal, the interface circuit configured to gate the strobe signal in order to successfully communicate with the electronic device. 
     
     
         2 . The apparatus according to  claim 1 , wherein the interface circuit increases a timing margin by increasing an amount of time for gating the strobe signal in a postamble window by minimizing a logic delay of a gating path through the interface circuit. 
     
     
         3 . The apparatus according to  claim 1 , wherein the interface circuit independently places rising and falling edges of an enable signal for the strobe signal in respective timing windows. 
     
     
         4 . The apparatus according to  claim 1 , wherein the interface circuit adjusts ungating and gating times of the strobe signal as a function of one or more samples of the strobe signal. 
     
     
         5 . The apparatus according to  claim 1 , wherein the interface circuit increases a timing margin by increasing an effective preamble window of the strobe signal. 
     
     
         6 . The apparatus according to  claim 1 , wherein the interface circuit increases a timing margin by adjusting a phase of an enable signal for the strobe signal depending on characteristics of the electronic device. 
     
     
         7 . The apparatus according to  claim 1 , wherein the electronic device comprises a memory. 
     
     
         8 . The apparatus according to  claim 7 , wherein the memory comprises multiple ranks. 
     
     
         9 . An electronic apparatus, comprising:
 an electronic device that uses a strobe signal to communicate in a source synchronous manner; and   an interface circuit coupled to the electronic device to receive the strobe signal, the interface circuit configured to gate the strobe signal to provide a gated strobe signal so as to increase reliability of communication with the electronic device.   
     
     
         10 . The electronic apparatus according to  claim 9 , further comprising a capture register that uses the gated strobe signal to receive data from the electronic device. 
     
     
         11 . The apparatus according to  claim 9 , wherein the interface circuit comprises a shift circuit that shifts an enable signal associated with the strobe signal to generate a shifted enable signal. 
     
     
         12 . The electronic apparatus according to  claim 11 , wherein the interface circuit further comprises a logic gate coupled to receive the strobe signal as a first input and to provide the gated strobe signal as an output. 
     
     
         13 . The electronic apparatus according to  claim 12 , wherein the interface circuit further comprises a register clocked by the strobe signal. 
     
     
         14 . The electronic apparatus according to  claim 13 , wherein the logic gate is coupled to accept an output signal of the register as a second input. 
     
     
         15 . The electronic apparatus according to  claim 14 , wherein the logic gate comprises a NAND gate. 
     
     
         16 . The electronic apparatus according to  claim 13 , wherein an asynchronous set input of the register is coupled to the shifted enable signal. 
     
     
         17 . The electronic apparatus according to  claim 11 , wherein the interface circuit further comprises a second logic gate coupled to receive the enable signal as a first input and a configuration bit as a second input, wherein an output of the second logic gate is coupled to the input of the shift circuit. 
     
     
         18 . The electronic apparatus according to  claim 14 , wherein the register has an optimized clock-to-output (TCO) delay. 
     
     
         19 . The electronic apparatus according to  claim 16 , wherein a falling edge of the enable signal is delayed. 
     
     
         20 . The electronic apparatus according to  claim 16 , wherein the interface circuit further comprises a third logic gate coupled to receive the output of the register as a first input, to receive the output of the shift circuit as a second input, and to provide an output signal to the second input of the first logic gate. 
     
     
         21 . The electronic apparatus according to  claim 11 , wherein the interface circuit adjusts a phase of the shifted enable signal based on a variation of the strobe signal because of temperature variation and/or voltage variation. 
     
     
         22 . The electronic apparatus according to  claim 11 , wherein the interface circuit adjusts a phase of the shifted enable signal based on one or more samples of the strobe signal. 
     
     
         23 . The electronic apparatus according to  claim 22 , wherein the interface circuit re-interprets the one or more samples based on age of the one or more samples and/or intervening phase adjustments of the shifted enable signal. 
     
     
         24 . The electronic apparatus according to  claim 22 , wherein the interface circuit obtains the one or more samples during source synchronous communication with the electronic device. 
     
     
         25 . The electronic apparatus according to  claim 9 , wherein the interface circuit extends an effective preamble time of the strobe signal by creating a trigger pulse, as a function of the strobe signal and an enable signal, that is used to ungate a delayed strobe signal. 
     
     
         26 . The electronic apparatus according to  claim 9 , wherein the interface circuit processes the gated strobe signal to remove one or more spurious edges. 
     
     
         27 . The electronic apparatus according to  claim 11 , wherein the interface circuit is configured to communicate with a plurality of electronic devices in a source synchronous manner, wherein each electronic device in the plurality of electronic devices has a corresponding strobe signal in a plurality of strobe signals, and the interface circuit uses a corresponding enable signal shift based on information in a storage circuit that indicates with which of the plurality of logic devices the interface circuit is communicating. 
     
     
         28 . The electronic apparatus according to  claim 11 , wherein the interface circuit further comprises:
 a first storage circuit that stores information for adjusting the gating of the strobe; and   a second storage circuit that stores information for adjusting the ungating of the strobe.   
     
     
         29 . The electronic apparatus according to  claim 27 , wherein the storage circuit is clocked by the enable signal. 
     
     
         30 . The electronic apparatus according to  claim 11 , wherein the interface circuit further comprises programmable inverters coupled to, respectively, inputs and outputs of the shift circuit. 
     
     
         31 . A method of providing source synchronous communication in a logic circuit, the method comprising:
 receiving a strobe signal; and   gating the strobe signal so as to successfully provide source synchronous communication.   
     
     
         32 . The method according to  claim 31 , wherein the strobe signal comprises a postamble window, and wherein gating the strobe signal further comprises increasing an amount of time for gating the strobe signal in the postamble window by minimizing a logic delay of a gating path. 
     
     
         33 . The method according to  claim 31 , wherein gating the strobe signal further comprises:
 using an enable signal; and   independently placing rising and falling edges of the enable signal in respective timing windows.   
     
     
         34 . The method according to  claim 31 , wherein gating the strobe signal further comprises adjusting ungating and gating times of the strobe signal as a function of one or more samples of the strobe signal. 
     
     
         35 . The method according to  claim 31 , wherein the strobe signal comprises a preamble window, and wherein gating the strobe signal further comprises increasing an effective preamble window of the strobe signal. 
     
     
         36 . The method according to  claim 31 , wherein providing source synchronous communication further comprises communicating with a memory device. 
     
     
         37 . The method according to  claim 36 , wherein the memory device comprises a plurality of ranks. 
     
     
         38 . The method according to  claim 37 , wherein each rank in the plurality of ranks has a corresponding strobe signal in a plurality of strobe signals. 
     
     
         39 . The method according to  claim 38 , wherein each strobe signal in the plurality of strobe signals has a corresponding enable signal shift in a plurality of enable signal shifts. 
     
     
         40 . The method according to  claim 39 , wherein gating the strobe signal comprises:
 storing a phase shift for the enable signal corresponding to the strobe signal that corresponds to each rank in the plurality of ranks; and   communicating with at least one rank by using the phase shift corresponding to the enable signal that corresponds to the at least one rank.

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