US2012018853A1PendingUtilityA1

Photoelectrochemical etching of p-type semiconductor heterostructures

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Assignee: TAMBOLI ADELEPriority: May 12, 2008Filed: Sep 28, 2011Published: Jan 26, 2012
Est. expiryMay 12, 2028(~1.8 yrs left)· nominal 20-yr term from priority
H10D 62/8503H10P 50/648H10H 20/0137
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Claims

Abstract

A method for photoelectrochemical (PEC) etching of a p-type semiconductor layer simply and efficiently, by providing a driving force for holes to move towards a surface of a p-type cap layer to be etched, wherein the p-type cap layer is on a heterostructure and the heterostructure provides the driving force from an internal bias generated internally in the heterostructure; generating electron-hole pairs in a separate area of the heterostructure than the surface to be etched; and using an etchant solution to etch the surface of the p-type layer.

Claims

exact text as granted — not AI-modified
1 . A device, comprising:
 a p-type semiconductor layer having a surface etched by photo-electrochemical (PEC) etching, wherein the etched surface has less damage as compared to a similar surface etched by ion-assisted plasma etching or dry etching.   
     
     
         2 . The device of  claim 1 , wherein the etched surface is not a crystallographic plane of the p-type semiconductor layer. 
     
     
         3 . The device of  claim 1 , wherein the etched surface includes one or more anisotropic trenches. 
     
     
         4 . The device of  claim 1 , wherein the etched surface has a smoothness or roughness comparable to an etched surface of an n-type semiconductor. 
     
     
         5 . The device of  claim 1 , wherein the PEC etching does not introduce any damage to the p-type semiconductor layer. 
     
     
         6 . A method for fabricating a device, comprising:
 photo-electrochemical (PEC) etching a surface of a p-type semiconductor layer of the device, wherein the etched surface has less damage as compared to a similar surface etched by ion-assisted plasma etching or dry etching.   
     
     
         7 . The method of  claim 6 , wherein the etched surface is not a crystallographic plane of the p-type semiconductor layer. 
     
     
         8 . The method of  claim 6 , wherein the etched surface includes one or more anisotropic trenches. 
     
     
         9 . The method of  claim 6 , wherein the etched surface has a smoothness or roughness comparable to an etched surface of an n-type semiconductor. 
     
     
         10 . The method of  claim 6 , wherein the PEC etching does not introduce any damage to the p-type semiconductor layer.

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