US2012023321A1PendingUtilityA1
Computer system
Est. expiryApr 14, 2028(~1.7 yrs left)· nominal 20-yr term from priority
G06F 11/20G06F 11/1666G06F 9/4401G06F 11/1456G06F 9/441
50
PatentIndex Score
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Claims
Abstract
A computer system including a first memory unit, a second memory unit, a switch and a microcontroller is provided. The first memory unit stores a first basic input/output system (BIOS). The microcontroller is coupled to the first memory unit, the second memory unit and the switch. Prior to a starting of the computer system, the microcontroller reads the first BIOS in the first memory unit and stores the first BIOS to the second memory unit when the microcontroller detects that the switch is conducted.
Claims
exact text as granted — not AI-modified1 . A computer system comprising:
a first memory unit storing a first basic input/output system; a second memory unit; a switch; a microcontroller coupled to the first memory unit, the second memory unit and the switch, wherein the microcontroller reads the first basic input/output system in the first memory unit and stores the first basic input/output system to the second memory unit when the microcontroller detects that the switch is conducted.
2 . The computer system according to claim 1 further comprising a standby power configured to be supplied to the microcontroller, the first memory unit and the second memory unit.
3 . The computer system according to claim 1 , wherein the switch has a first terminal coupled to a ground voltage and a second terminal coupled to a first detection terminal of the microcontroller, wherein the second terminal of the switch is further coupled to a first reference voltage through a first resistor.
4 . The computer system according to claim 3 , wherein the switch comprises a press button.
5 . The computer system according to claim 3 further comprising a switch element having a first terminal coupled to the ground voltage and a second terminal coupled to a second detection terminal of the microcontroller, wherein the second terminal of the switch element is further coupled to a second reference voltage through a second resistor.
6 . The computer system according to claim 5 , wherein the switch element comprises a jumper.
7 . The computer system according to claim 5 , wherein prior to a starting of the computer system, the microcontroller further reads the first basic input/output system in the first memory unit and stores the first basic input/output system to the second memory unit when the first detection terminal and the second detection terminal of microcontroller are coupled to the ground voltage.
8 . The computer system according to claim 5 , wherein prior to a starting of the computer system, the microcontroller further reads the first basic input/output system in the first memory unit and stores the first basic input/output system to the second memory unit when the first detection terminal is coupled to the ground voltage during a specific time period and the second detection terminal is continuously coupled to the ground voltage.
9 . The computer system according to claim 1 , wherein only the first memory unit is accessed by the microcontroller in response to a first enable signal from the microcontroller, meanwhile, the microcontroller reads the first basic input/output system in the first memory unit.
10 . The computer system according to claim 9 , wherein only the second memory unit is accessed by the microcontroller in response to a second enable signal from the microcontroller, meanwhile, the microcontroller stores the first basic input/output system to the second memory unit.
11 . The computer system according to claim 1 , wherein the microcontroller is a south bridge chip or an embedded controller.
12 . The computer system according to claim 1 , wherein the first memory unit and the second memory unit are non-volatile memories.Join the waitlist — get patent alerts
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