Pattern Verification Method, Pattern Verification System, Mask Manufacturing Method and Semiconductor Device Manufacturing Method

Abstract

A pattern verification method comprising preparing a desired pattern and a mask pattern forming the desired pattern on a substrate, defining at least one evaluation point on an edge of the desired pattern, defining at least one process parameter to compute the transferred/formed pattern, defining a reference value and a variable range for each of the process parameters, computing a positional displacement for each first points corresponding to the evaluation point, first points computed using correction mask pattern and a plurality of combinations of parameter values obtained by varying the process parameters within the variable range or within the respective variable ranges, the positional displacement being displacement between first point and the evaluation point, computing a statistics of the positional displacements for each of the evaluation points, and outputting information modifying the mask pattern according to the statistics.

1 - 24 . (canceled) 
     
     
         25 . A pattern verification method comprising:
 preparing a desired pattern and a mask pattern corrected to form the desired pattern on a substrate;   performing a process simulation for the mask pattern for the mask pattern under the first process condition to determine a first pattern profile formed on the substrate;   extracting spots showing a difference between the first pattern profile and the desired pattern greater than a predefined value;   performing a process simulation for the mask pattern under the second process condition different from the first process condition to determine a second pattern profile formed on the substrate;   extracting spots showing a difference between the second pattern profile and the desired pattern greater than the predefined value; and   sorting the extracted spots according to the position and the process condition.   
     
     
         26 - 33 . (canceled) 
     
     
         34 . A mask manufacturing method comprising:
 verifying a mask pattern by using the pattern verification method according to  claim 25 ; and   manufacturing a mask using the verified mask pattern.   
     
     
         35 . A semiconductor device manufacturing method comprising:
 preparing a mask formed by using the mask manufacturing method according to  claim 34 ; and   conducting a lithography process, using the mask.   
     
     
         36 - 37 . (canceled) 
     
     
         38 . A pattern verification system comprising:
 a simulation section configured to perform a process simulation for a mask pattern under first and second process conditions and determining first and second pattern profiles formed on a substrate;   an extracting section configured to extract spots showing a difference between the first pattern profile and a desired pattern greater than a predefined value and spots showing a difference between the second pattern profile and the desired pattern greater than the predefined value and obtaining a first group having the spots extracted from the first pattern profile and a second group having the spots extracted from the second pattern profile; and   a sorting section configured to sort the spots contained in the first and second groups according to position and process condition.