Method for self-aligning a stop layer to a replacement gate for self-aligned contact integration

Abstract

Semiconductor devices with replacement gate electrodes and integrated self aligned contacts are formed with enhanced gate dielectric layers and improved electrical isolation properties between the gate line and a contact. Embodiments include forming a removable gate electrode on a substrate, forming a self aligned contact stop layer over the electrode and the substrate, removing a portion of the self aligned contact stop layer over the electrode and the electrode itself leaving an opening, forming a replacement gate electrode of metal, in the opening, transforming an upper portion of the metal into a dielectric layer, and forming a self aligned contact. Embodiments include forming the contact stop layer of a dielectric material, and transforming the upper portion of the metal into a dielectric layer. Embodiments also include forming a hardmask layer over the removable gate electrode to protect the electrode during silicidation in source/drain regions of the semiconductor device.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a gate electrode, comprising a metal, over a substrate;   an SAC stop layer over the substrate;   a dielectric layer selectively formed from an upper portion of the metal gate electrode; and   an SAC through the SAC stop layer and/or through the dielectric layer.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising spacers on side surfaces of the gate electrode, wherein the SAC stop layer is over the spacers. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the dielectric layer comprises a nitride or an oxide. 
     
     
         4 . The semiconductor device according to  claim 3 , wherein the metal comprises aluminum and the dielectric layer comprises aluminum oxide (Al 2 O 3 ) formed by anodizing the aluminum. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the SAC stop layer comprises a dielectric material. 
     
     
         6 . The method according to  claim 5 , wherein the dielectric material comprises a hafnium oxide, aluminum oxide, or a silicon carbide. 
     
     
         7 . The method according to  claim 6 , wherein the dielectric material comprises a hafnium oxide. 
     
     
         8 . The semiconductor device according to  claim 2 , further comprising:
 a substrate region spaced from the gate electrode by the spacers; and   a silicide formed in the substrate region, under the SAC stop layer.