Circuit structure
Abstract
A circuit structure suitable for being disposed on a carrier board. The circuit structure comprises a first patterned conductive layer, a second patterned conductive layer, and a solder mask. The first patterned conductive layer is disposed on the carrier board. The second patterned conductive layer is disposed on a part of the first patterned conductive layer. A part of the edge of the second patterned conductive layer and a part of the edge of the first patterned conductive layer are substantially coplanar. The patterned solder mask covers a part of the first patterned conductive layer and has at least one opening for exposing the second patterned conductive layer and a part of the first patterned conductive layer adjacent to the second patterned conductive layer.
Claims
exact text as granted — not AI-modified1 . A circuit structure, suitable for being disposed on a carrier board, comprising:
a first patterned conductive layer disposed on the carrier board; a second patterned conductive layer disposed on a part of the first patterned conductive layer, a part of the edge of the second patterned conductive layer and a part of the edge of the first patterned conductive layer are substantially coplanar; and a patterned solder mask covering a part of the first patterned conductive layer, the patterned solder mask having at least one opening for exposing the second patterned conductive layer and a part of the first patterned conductive layer adjacent to the second patterned conductive layer.
2 . The circuit structure according to claim 1 , wherein the material of the first patterned conductive layer is one of copper, aluminum, gold, platinum, nickel, silver, tin, alloy of the above metals, and any combination thereof.
3 . The circuit structure according to claim 1 , wherein the material of the second patterned conductive layer is the same as the material of the first patterned conductive layer.
4 . The circuit structure according to claim 1 , further comprising a base conductive layer disposed between the first patterned conductive layer and the carrier board.Cited by (0)
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