Semiconductor device and power supply apparatus

Abstract

A semiconductor device includes a first transistor including a GaN-based semiconductor stacked structure formed over a substrate, a first gate electrode having a plurality of first fingers over the semiconductor stacked structure, a plurality of first drain electrodes provided along the first fingers, and a plurality of first source electrodes provided along the first fingers; a second transistor including the semiconductor stacked structure, a second gate electrode having a plurality of second fingers over the semiconductor stacked structure, the second drain electrodes provided along the second fingers, and a plurality of second source electrodes provided along the second fingers; a drain pad provided over or under the first drain electrodes, and coupled to the first drain electrodes; a source pad provided over or under the second source electrodes, and coupled to the second source electrodes; and a common pad coupled to the first source electrodes and the second drain electrodes.

1 . A semiconductor device comprising:
 a first transistor comprising a GaN-based semiconductor stacked structure formed over a substrate, a first gate electrode having a plurality of first fingers over the GaN-based semiconductor stacked structure, a plurality of first drain electrodes provided along the first fingers, and a plurality of first source electrodes provided along the first fingers;   a second transistor comprising the GaN-based semiconductor stacked structure, a second gate electrode having a plurality of second fingers over the GaN-based semiconductor stacked structure, a plurality of second drain electrodes provided along the second fingers, and a plurality of second source electrodes provided along the second fingers;   a drain pad provided over or under the plurality of first drain electrodes, and coupled to the plurality of first drain electrodes;   a source pad provided over or under the plurality of second source electrodes, and coupled to the plurality of second source electrodes; and   a common pad coupled to the plurality of first source electrodes and the plurality of second drain electrodes.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising a common interconnection layer coupled to the plurality of first source electrodes and the plurality of second drain electrodes,
 wherein the common pad is coupled to the plurality of first source electrodes and the plurality of second drain electrodes via the common interconnection layer.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein the common interconnection layer comprises a plurality of interconnection layers extending, respectively, from over the first source electrodes to over the second drain electrodes, and the common pad is a portion of a redistribution layer provided over the plurality of interconnection layers. 
     
     
         4 . The semiconductor device according to  claim 2 , further comprising:
 a plurality of first through holes provided in the substrate and the GaN-based semiconductor stacked structure;   a plurality of first contacts provided, respectively, in the plurality of first through holes and coupled, respectively, to the plurality of first source electrodes;   a plurality of second through holes provided in the substrate and the GaN-based semiconductor stacked structure; and   a plurality of second contacts provided, respectively, in the plurality of second through holes and coupled, respectively, to the plurality of second drain electrodes,   wherein the common interconnection layer is provided on a back face of the substrate under the plurality of first source electrodes and the plurality of second drain electrodes, is coupled to the respective first source electrodes via the respective first contacts, and is couple to the respective second drain electrodes via the respective second contacts.   
     
     
         5 . The semiconductor device according to  claim 4 , wherein the common pad is a metal frame coupled to the common interconnection layer, and extending from a back face side to a front face side. 
     
     
         6 . The semiconductor device according to  claim 4 , wherein the common pad is provided in a front face side, and further comprising:
 a third through hole provided in the substrate and the GaN-based semiconductor stacked structure, and   a third contact provided in the third through hole, and coupling between the common interconnection layer and the common pad.   
     
     
         7 . The semiconductor device according to  claim 1 , further comprising:
 a plurality of first source interconnection layers provided, respectively, over the plurality of first source electrodes, and coupled, respectively, to the plurality of first source electrodes;   a plurality of second drain interconnection layers provided, respectively, over the plurality of second drain electrodes, and coupled, respectively, to the plurality of second drain electrodes; and   a common redistribution layer extending from over the plurality of first source interconnection layers to over the plurality of second drain interconnection layers, and coupled to the plurality of first source interconnection layers and the plurality of second drain interconnection layers,   wherein the common pad is defined by a portion of the common redistribution layer.   
     
     
         8 . The semiconductor device according to  claim 1 , further comprising:
 a plurality of first drain interconnection layers provided, respectively, over the plurality of first drain electrodes, and coupled, respectively, to the plurality of first drain electrodes;   a first drain redistribution layer provided over the plurality of first drain interconnection layers, and coupled to the plurality of first drain interconnection layers;   a plurality of second source interconnection layers provided, respectively, over the plurality of second source electrodes, and coupled, respectively, to the plurality of second source electrodes; and   a second source redistribution layer provided over the plurality of second source interconnection layers, and coupled to the plurality of second source interconnection layers,   wherein the drain pad is defined by a portion of the first drain redistribution layer, and the source pad is defined by a portion of the second source redistribution layer.   
     
     
         9 . The semiconductor device according to  claim 4 , further comprising:
 a first drain interconnection layer provided over the plurality of first drain electrodes, and coupled to the plurality of first drain electrodes; and   a second source interconnection layer provided over the plurality of second source electrodes, and coupled to the plurality of second source electrodes;   wherein the drain pad is defined by a portion of the first drain interconnection layer, and the source pad is defined by a portion of the second source interconnection layer.   
     
     
         10 . The semiconductor device according to  claim 1 , wherein a distance between a respective one of the first fingers and a respective one of the first drain electrodes is greater than a distance between a respective one of the first fingers and a respective one of the first source electrodes, and a distance between a respective one of the second fingers and a respective one of the second drain electrodes is greater than a distance between a respective one of the second fingers and a respective one of the second source electrodes. 
     
     
         11 . The semiconductor device according to  claim 1  further comprising a control circuit, integrated over the substrate, to output a control signal to the first gate electrode and the second gate electrode. 
     
     
         12 . A power supply apparatus comprising:
 a semiconductor device comprising:
 a first transistor comprising a GaN-based semiconductor stacked structure formed over a substrate, a first gate electrode having a plurality of first fingers over the GaN-based semiconductor stacked structure, a plurality of first drain electrodes provided along the first fingers, and a plurality of first source electrodes provided along the first fingers; 
 a second transistor comprising the GaN-based semiconductor stacked structure, a second gate electrode having a plurality of second fingers over the GaN-based semiconductor stacked structure, a plurality of second drain electrodes provided along the second fingers, and a plurality of second source electrodes provided along the second fingers; 
 a drain pad provided over or under the plurality of first drain electrodes, and coupled to the plurality of first drain electrodes; 
 a source pad provided over or under the plurality of second source electrodes, and coupled to the plurality of second source electrodes; and 
 a common pad coupled to the plurality of first source electrodes and the plurality of second drain electrodes; 
   a coil coupled to the semiconductor device;   a capacitor coupled to the coil; and   a control circuit to control the first transistor and the second transistor.   
     
     
         13 . The power supply apparatus according to  claim 12 , wherein the control circuit is integrated over the substrate. 
     
     
         14 . The power supply apparatus according to  claim 12 , wherein the control circuit is formed over a different substrate and is coupled to the semiconductor device.