Methods of Forming Integrated Circuit Devices Having Anisotropically-Oxidized Nitride Layers

Abstract

Methods of forming integrated circuit devices include forming a gate electrode on a substrate and forming a nitride layer on a sidewall and upper surface of the gate electrode. The nitride layer is then anisotropically oxidized under conditions that cause a first portion of the nitride layer extending on the upper surface of the gate electrode to be more heavily oxidized relative to a second portion of the nitride layer extending on the sidewall of the gate electrode. A ratio of a thickness of an oxidized first portion of the nitride layer relative to a thickness of an oxidized second portion of the nitride layer may be in a range from about 3:1 to about 7:1.

1 . A method of forming an integrated circuit device, comprising:
 forming a gate electrode on a substrate;   forming a nitride layer on a sidewall and upper surface of the gate electrode; and   anisotropically oxidizing the nitride layer under conditions that cause a first portion of the nitride layer extending on the upper surface of the gate electrode to be more heavily oxidized relative to a second portion of the nitride layer extending on the sidewall of the gate electrode.   
     
     
         2 . The method of  claim 1 , wherein said anisotropically oxidizing comprises anisotropically oxidizing the nitride layer for a sufficient duration to completely oxidize the first portion of the nitride layer but only partially oxidize the second portion of the nitride layer. 
     
     
         3 . The method of  claim 2 , wherein said anisotropically oxidizing is followed by a step of removing the completely oxidized first portion of the nitride layer from the upper surface of the gate electrode. 
     
     
         4 . The method of  claim 3 , wherein said removing comprises removing oxide from the partially oxidized second portion of the nitride layer to thereby expose a thinned nitride layer on the sidewall of the gate electrode. 
     
     
         5 . The method of  claim 4 , wherein said removing is followed by conformally depositing an oxide layer on the thinned nitride layer and on the upper surface of the gate electrode. 
     
     
         6 . The method of  claim 1 , wherein said anisotropically oxidizing comprises exposing the nitride layer to an oxygen-based plasma that is devoid of hydrogen. 
     
     
         7 . The method of  claim 1 , wherein said anisotropically oxidizing comprises exposing the nitride layer to an oxygen-based plasma that is devoid of hydrogen, while simultaneously biasing the substrate with a negative voltage. 
     
     
         8 . The method of  claim 1 , wherein said anisotropically oxidizing comprises exposing the nitride layer to an oxygen-based plasma that is biased at a positive voltage bias, while simultaneously biasing the substrate with a negative voltage. 
     
     
         9 . The method of  claim 8 , wherein a difference between the positive voltage bias and the negative voltage bias is in a range from about 150 Volts to about 400 Volts. 
     
     
         10 . The method of  claim 9 , wherein the oxygen-based plasma is devoid of hydrogen. 
     
     
         11 . The method of  claim 10 , wherein the oxygen-based plasma comprises at least one of argon cations and helium cations. 
     
     
         12 . The method of  claim 1 , wherein a ratio of a thickness of an oxidized first portion of the nitride layer relative to a thickness of an oxidized second portion of the nitride layer is in a range from about 3:1 to about 7:1. 
     
     
         13 . A method of forming an integrated circuit device, comprising:
 forming a gate electrode on a substrate;   forming a nitride layer on a sidewall and upper surface of the gate electrode; and   oxidizing the nitride layer using an oxygen-based plasma that is devoid of hydrogen.   
     
     
         14 . The method of  claim 13 , wherein said oxidizing comprises completely oxidizing a first portion of the nitride layer extending on the upper surface of the gate electrode. 
     
     
         15 . The method of  claim 14 , wherein said oxidizing is followed by removing the completely oxidized first portion of the nitride layer. 
     
     
         16 . The method of  claim 13 , wherein said oxidizing comprises exposing the nitride layer to an oxygen-based plasma that is biased at a positive voltage, while simultaneously biasing the substrate with a negative voltage. 
     
     
         17 . The method of  claim 16 , wherein a difference between the positive voltage bias and the negative voltage is in a range from about 150 Volts to about 400 Volts. 
     
     
         18 . The method of  claim 14 , wherein a ratio of a thickness of the completely oxidized first portion of the nitride layer relative to a thickness of an oxidized second portion of the nitride layer extending opposite the sidewall of the gate electrode is in a range from about 3:1 to about 7:1.