Methods and systems for semiconductor testing using a testing scenario language

Abstract

Methods and systems for semiconductor testing. In one embodiment, a semiconductor testing method includes one or more of the following stages: defining a rule relating to semiconductor testing, validating the rule, bundling the rule with other rules, correlating the rule with other rules, publishing the rule, actualizing the rule, and follow up relating to the rule. In one embodiment, a semiconductor testing system includes one or more of the following modules: rule creation module(s), analysis module(s), simulation module(s), real time production module(s), and offline production module(s). In one embodiment, user friendly graphical user interface(s) can be used for defining the building blocks of a rule and/or for viewing an optional hierarchy of categories to which the rule belongs.

1 . A method of creating a rule set relating to semiconductor testing, comprising:
 comparing a rule relating to semiconductor testing with at least one other rule relating to semiconductor testing, according to at least one predetermined criterion;   resolving any problematic relationship determined by said comparator between said rule and said at least one other rule; and   preparing a rule set including said rule for actualization after any problematic relationship has been resolved.   
     
     
         2 . The method of  claim 1 , further comprising:
 actualizing said rule set.   
     
     
         3 . The method of  claim 1 , wherein said criterion is at least one selected from a group comprising: redundancy, priority, conflicts between actions, conflicts between rule types, other conflict, inconsistency, inter-dependence, validation with repositories, and timing execution. 
     
     
         4 . The method of  claim 1 , further comprising: defining said rule. 
     
     
         5 . The method of  claim 4 , wherein said defining includes defining monitored data which may be leveraged during actualization of said rule. 
     
     
         6 . The method of  claim 5 , wherein said monitored data includes at least one selected from a group comprising: lithography, defects and particles, other fabrication measurements, etest test results, sort results, burn-in results, final test results, system validation results, other test socket results, other test results, neighbors, geography, previous lots, previous wafers, current die, status of another rule, data on same material from a different operation, and data from different material for same operation. 
     
     
         7 . A method of creating a rule relating to semiconductor testing, comprising:
 receiving a specification of a parameter for a rule relating to semiconductor testing, wherein said specification does not provide said parameter with a definitive value; and   simulating said rule a plurality of times with different values for said parameter in order to quantify a definitive value for said parameter.   
     
     
         8 . The method of  claim 7 , further comprising: actualizing said rule with said definitive parameter value. 
     
     
         9 . A method of creating a rule relating to semiconductor testing, comprising:
 providing at least one parameter for a semiconductor rule; wherein said at least one parameter defines a condition for actualization of said rule; and   assuming whether said condition exists and simulating actualization or non actualization of said semiconductor rule accordingly.   
     
     
         10 . The method of  claim 9 , further comprising: actualizing said simulated rule in production. 
     
     
         11 . The method of  claim 9 , wherein said condition is at least one from a group comprising: population, entry conditions, action, validity conditions, run point, end point, scope, algorithm object, rule states, lithography, defects and particles, other fabrication measurements, etest test results, sort results, burn-in results, final test results, system validation results, other test socket results, other test results, neighbors, geography, previous lots, previous wafers, current die, status of another rule, data on same material from a different operation, and data from different material for same operation. 
     
     
         12 . The method of  claim 9 , further comprising:
 determining an anticipated value for a return on investment criterion for a plurality of rules including said semiconductor rule based on simulation of said plurality of rules;   determining an actual value for said return on investment criterion for said plurality of rules based on actualization of said plurality of rules; and   comparing said anticipated value with said actual value.   
     
     
         13 . The method of  claim 12 , wherein said return on investment criterion is at least one selected from a group comprising: yield loss prevention, test time reduction, quality improvement, reliability augmentation, test escape prevention, test fleet health, and statistical process control. 
     
     
         14 . The method of  claim 12 , further comprising: adapting at least one of said plurality of rules based on said comparing, if necessary.